Date:   Tue, 31 Jan 2023 13:40:13 +0200
From:   Leon Romanovsky <leon@kernel.org>
To:     Alex Elder <elder@linaro.org>
Cc:     davem@davemloft.net, edumazet@google.com, kuba@kernel.org,
        pabeni@redhat.com, caleb.connolly@linaro.org, mka@chromium.org,
        evgreen@chromium.org, andersson@kernel.org,
        quic_cpratapa@quicinc.com, quic_avuyyuru@quicinc.com,
        quic_jponduru@quicinc.com, quic_subashab@quicinc.com,
        elder@kernel.org, netdev@vger.kernel.org,
        linux-arm-msm@vger.kernel.org, linux-kernel@vger.kernel.org
Subject: Re: [PATCH net-next 0/8] net: ipa: remaining IPA v5.0 support
Message-ID: <Y9j+Ha5t+DSB+rRm@unreal>
References: <20230130210158.4126129-1-elder@linaro.org>
MIME-Version: 1.0
Content-Type: text/plain; charset=us-ascii
Content-Disposition: inline
In-Reply-To: <20230130210158.4126129-1-elder@linaro.org>
Precedence: bulk

On Mon, Jan 30, 2023 at 03:01:50PM -0600, Alex Elder wrote:
> This series includes almost all remaining IPA code changes required
> to support IPA v5.0.  IPA register definitions and configuration
> data for IPA v5.0 will be sent later (soon).  Note that the GSI
> register definitions still require work.  GSI for IPA v5.0 supports
> up to 256 (rather than 32) channels, and this changes the way GSI
> register offsets are calculated.  A few GSI register fields also
> change.
> 
> The first patch in this series increases the number of IPA endpoints
> supported by the driver, from 32 to 36.  The next updates the width
> of the destination field for the IP_PACKET_INIT immediate command so
> it can represent up to 256 endpoints rather than just 32.  The next
> adds a few definitions of some IPA registers and fields that are
> first available in IPA v5.0.
> 
> The next two patches update the code that handles router and filter
> table caches.  Previously these were referred to as "hashed" tables,
> and the IPv4 and IPv6 tables are now combined into one "unified"
> table.  The sixth and seventh patches add support for a new pulse
> generator, which allows time periods to be specified with a wider
> range of clock resolution.  And the last patch just defines two new
> memory regions that were not previously used.
> 
> 					-Alex
> 
> Alex Elder (8):
>   net: ipa: support more endpoints
>   net: ipa: extend endpoints in packet init command
>   net: ipa: define IPA v5.0+ registers
>   net: ipa: update table cache flushing
>   net: ipa: support zeroing new cache tables
>   net: ipa: greater timer granularity options
>   net: ipa: support a third pulse register
>   net: ipa: define two new memory regions
> 

Thanks,
Reviewed-by: Leon Romanovsky <leonro@nvidia.com>