Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id 70405C63797 for ; Wed, 1 Feb 2023 09:07:38 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S230523AbjBAJHh (ORCPT ); Wed, 1 Feb 2023 04:07:37 -0500 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:60742 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S230255AbjBAJHe (ORCPT ); Wed, 1 Feb 2023 04:07:34 -0500 Received: from mx0b-0031df01.pphosted.com (mx0b-0031df01.pphosted.com [205.220.180.131]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id 296B661D4C; Wed, 1 Feb 2023 01:07:07 -0800 (PST) Received: from pps.filterd (m0279868.ppops.net [127.0.0.1]) by mx0a-0031df01.pphosted.com (8.17.1.19/8.17.1.19) with ESMTP id 3117imPZ014294; Wed, 1 Feb 2023 09:06:25 GMT DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=quicinc.com; h=from : to : cc : subject : date : message-id : in-reply-to : references : mime-version : content-type; s=qcppdkim1; bh=eIk+ESOJbf5hW7OxG66KDPepkQLszeLpZ6BZk2yiw/A=; b=YaqGg/arSffSLWPRFUrtR7EXwWEo8ac5Qw7ndjYDwN8aGqjWSnfTHO6iLpq38vGkjL4z 6kTZ7XWnJPu7jKRxzQvD2tbWl+jqIEf+8wAjQdHYHn4pC7/6W8nRTDVkzFoK+w4p9cvV IbhLbgjyqcrP6DaF3nnVRrS2nukri6vI7k/DCchElhhE/ksom4Y1WucsOaba4gx8r64O uHSl86xZoI6pV5WE10d45ItlehJFhFEkCJnTK26mE7qrCTUsucpujxSfj3RsrsVfwSEg p0W8CB5Yh5V701ZDbXi5pZ/Y1qw+WRBQAibS9+i41KBffTnAafIUuTWTnKe7fj/eW+y1 uA== Received: from nalasppmta05.qualcomm.com (Global_NAT1.qualcomm.com [129.46.96.20]) by mx0a-0031df01.pphosted.com (PPS) with ESMTPS id 3neuwcbkwr-1 (version=TLSv1.2 cipher=ECDHE-RSA-AES256-GCM-SHA384 bits=256 verify=NOT); Wed, 01 Feb 2023 09:06:24 +0000 Received: from nalasex01a.na.qualcomm.com (nalasex01a.na.qualcomm.com [10.47.209.196]) by NALASPPMTA05.qualcomm.com (8.17.1.5/8.17.1.5) with ESMTPS id 31196NlM029195 (version=TLSv1.2 cipher=ECDHE-RSA-AES256-GCM-SHA384 bits=256 verify=NOT); Wed, 1 Feb 2023 09:06:23 GMT Received: from poovendh-linux.qualcomm.com (10.80.80.8) by nalasex01a.na.qualcomm.com (10.47.209.196) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_256_GCM_SHA384) id 15.2.986.36; Wed, 1 Feb 2023 01:06:14 -0800 From: Poovendhan Selvaraj To: , , , , , , , , , , , , , , , , , , , , , , , CC: , , , , , , Subject: [PATCH V2 3/5] firmware: scm: Modify only the DLOAD bit in TCSR register for download mode Date: Wed, 1 Feb 2023 14:35:27 +0530 Message-ID: <20230201090529.30446-4-quic_poovendh@quicinc.com> X-Mailer: git-send-email 2.17.1 In-Reply-To: <20230201090529.30446-1-quic_poovendh@quicinc.com> References: <20230201090529.30446-1-quic_poovendh@quicinc.com> MIME-Version: 1.0 Content-Type: text/plain X-Originating-IP: [10.80.80.8] X-ClientProxiedBy: nasanex01b.na.qualcomm.com (10.46.141.250) To nalasex01a.na.qualcomm.com (10.47.209.196) X-QCInternal: smtphost X-Proofpoint-Virus-Version: vendor=nai engine=6200 definitions=5800 signatures=585085 X-Proofpoint-GUID: Z7ALDorLNJ1Qelgc3Td_nvvWEaXCuvYa X-Proofpoint-ORIG-GUID: Z7ALDorLNJ1Qelgc3Td_nvvWEaXCuvYa X-Proofpoint-Virus-Version: vendor=baseguard engine=ICAP:2.0.219,Aquarius:18.0.930,Hydra:6.0.562,FMLib:17.11.122.1 definitions=2023-02-01_03,2023-01-31_01,2022-06-22_01 X-Proofpoint-Spam-Details: rule=outbound_notspam policy=outbound score=0 mlxlogscore=999 adultscore=0 malwarescore=0 bulkscore=0 suspectscore=0 phishscore=0 spamscore=0 impostorscore=0 priorityscore=1501 lowpriorityscore=0 mlxscore=0 clxscore=1015 classifier=spam adjust=0 reason=mlx scancount=1 engine=8.12.0-2212070000 definitions=main-2302010079 Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org Add support to read-modify-write TCSR register to modify only DLOAD bit. Co-developed-by: Anusha Rao Signed-off-by: Anusha Rao Co-developed-by: Kathiravan Thirumoorthy Signed-off-by: Kathiravan Thirumoorthy Signed-off-by: Poovendhan Selvaraj --- drivers/firmware/qcom_scm.c | 12 ++++++++---- 1 file changed, 8 insertions(+), 4 deletions(-) diff --git a/drivers/firmware/qcom_scm.c b/drivers/firmware/qcom_scm.c index 2000323722bf..e3435587a72d 100644 --- a/drivers/firmware/qcom_scm.c +++ b/drivers/firmware/qcom_scm.c @@ -407,7 +407,7 @@ int qcom_scm_set_remote_state(u32 state, u32 id) } EXPORT_SYMBOL(qcom_scm_set_remote_state); -static int __qcom_scm_set_dload_mode(struct device *dev, bool enable) +static int __qcom_scm_set_dload_mode(struct device *dev, u32 val, bool enable) { struct qcom_scm_desc desc = { .svc = QCOM_SCM_SVC_BOOT, @@ -417,7 +417,7 @@ static int __qcom_scm_set_dload_mode(struct device *dev, bool enable) .owner = ARM_SMCCC_OWNER_SIP, }; - desc.args[1] = enable ? QCOM_SCM_BOOT_SET_DLOAD_MODE : 0; + desc.args[1] = enable ? val | QCOM_SCM_BOOT_SET_DLOAD_MODE : 0; return qcom_scm_call_atomic(__scm->dev, &desc, NULL); } @@ -426,15 +426,19 @@ static void qcom_scm_set_download_mode(bool enable) { bool avail; int ret = 0; + u32 dload_addr_val; avail = __qcom_scm_is_call_available(__scm->dev, QCOM_SCM_SVC_BOOT, QCOM_SCM_BOOT_SET_DLOAD_MODE); + ret = qcom_scm_io_readl(__scm->dload_mode_addr, &dload_addr_val); + if (avail) { - ret = __qcom_scm_set_dload_mode(__scm->dev, enable); + ret = __qcom_scm_set_dload_mode(__scm->dev, dload_addr_val, enable); } else if (__scm->dload_mode_addr) { ret = qcom_scm_io_writel(__scm->dload_mode_addr, - enable ? QCOM_SCM_BOOT_SET_DLOAD_MODE : 0); + enable ? dload_addr_val | + QCOM_SCM_BOOT_SET_DLOAD_MODE : 0); } else { dev_err(__scm->dev, "No available mechanism for setting download mode\n"); -- 2.17.1