From:   "Luck, Tony" <tony.luck@intel.com>
To:     Greg KH <gregkh@linuxfoundation.org>,
        "Joseph, Jithu" <jithu.joseph@intel.com>
CC:     "hdegoede@redhat.com" <hdegoede@redhat.com>,
        "markgross@kernel.org" <markgross@kernel.org>,
        "tglx@linutronix.de" <tglx@linutronix.de>,
        "mingo@redhat.com" <mingo@redhat.com>,
        "bp@alien8.de" <bp@alien8.de>,
        "dave.hansen@linux.intel.com" <dave.hansen@linux.intel.com>,
        "x86@kernel.org" <x86@kernel.org>, "hpa@zytor.com" <hpa@zytor.com>,
        "rostedt@goodmis.org" <rostedt@goodmis.org>,
        "Raj, Ashok" <ashok.raj@intel.com>,
        "linux-kernel@vger.kernel.org" <linux-kernel@vger.kernel.org>,
        "platform-driver-x86@vger.kernel.org" 
        <platform-driver-x86@vger.kernel.org>,
        "patches@lists.linux.dev" <patches@lists.linux.dev>,
        "Shankar, Ravi V" <ravi.v.shankar@intel.com>,
        "Macieira, Thiago" <thiago.macieira@intel.com>,
        "Jimenez Gonzalez, Athenas" <athenas.jimenez.gonzalez@intel.com>,
        "Mehta, Sohil" <sohil.mehta@intel.com>
Subject: RE: [PATCH 4/5] platform/x86/intel/ifs: Implement Array BIST test
Thread-Topic: [PATCH 4/5] platform/x86/intel/ifs: Implement Array BIST test
Thread-Index: AQHZNc4J4EU3Q3ktD0OwChsEsRbA+K65iRqAgADKv3A=
Date:   Wed, 1 Feb 2023 17:22:18 +0000
Message-ID: <SJ1PR11MB6083EBD2D2826E0A247AF242FCD19@SJ1PR11MB6083.namprd11.prod.outlook.com>
References: <20230131234302.3997223-1-jithu.joseph@intel.com>
 <20230131234302.3997223-5-jithu.joseph@intel.com>
 <Y9nyWVNtfBEny66w@kroah.com>
In-Reply-To: <Y9nyWVNtfBEny66w@kroah.com>
Accept-Language: en-US
Content-Language: en-US
x-ms-exchange-antispam-messagedata-chunkcount: 1
x-ms-exchange-antispam-messagedata-0: =?us-ascii?Q?VSFRx7U+LfZxti+6ZH4Pmp59hHtZ9LLeV+gmNaPD8aT2YeHbHaXVCu1lN/gz?=
 =?us-ascii?Q?uPNxk7MfynSdRX84t9fCxtXy6L/YQkrR13UqvD1CPRSFy9kZhCrsV2S8Tcst?=
 =?us-ascii?Q?CUyiEG4qP5QuiYyqBg1q4KdXfB7q1TrquQ/2nsO1yoI6yr9kImiadXup+Gjj?=
 =?us-ascii?Q?KuqxF45a35PgCLy/zwvLcmRbyiAu+ZP4q83nykDK3CbZO5IkzjtAWnBlpaod?=
 =?us-ascii?Q?bNTIop/dhXEDiTXBZXPL+ulpnJPx/Re76Y/kvjjt0zRKNhlJMBzJI9+tsN/Y?=
 =?us-ascii?Q?XfeCcHX4+OQZQ/Ik3I3T45k+h0Hab++ZmKDVTPPKxtBlaGN0p3+baCGlYQc+?=
 =?us-ascii?Q?2Z9f5kYoi3opaXNcZneYRut7zRcADOF4ulpC1B/kgRD8FiWt2BGhHvfjxUU0?=
 =?us-ascii?Q?bQ9LeWQcO04I2AIFw9ex+jZtVgkfbiM3Y5rurRvjUqZV2aByHrH6CXAUFX7e?=
 =?us-ascii?Q?lUkQa/Fm8/S0iPHb/fA8yyI2b80eezrEig5uuD8JehT4A9wquw6YLyVMapWP?=
 =?us-ascii?Q?HxjeDkESF0DtPb3mSMAnaEo+upG0FA+M+YX4qM9deA2gEatMxjkIO61oVLH6?=
 =?us-ascii?Q?xVgTQ6hJFRKsUCjgwuR+DCQOU880p9bNPAxHcBY3aYzJazCEXLS27b+/iJeW?=
 =?us-ascii?Q?Pd1+OR6RhIi5bLh6B9vqSqC1YqQsbUBpZYMy15q6Re7MvbeqxMQTn4n4qFT4?=
 =?us-ascii?Q?JlhoRUc/njAU6J8tM5wr/UKXHj/wjg2fVERWrP6L6cUWc0FKs8/on5/VElFU?=
 =?us-ascii?Q?cZqhGfHOF7Ymv+78/31u8oHkbhag38/wcvMVIiCYztsKntga7z8W9Z2G9CTD?=
 =?us-ascii?Q?pLUHjZHkgjdWIJcfgicUPCtxZuA3VsSlZRstQBlplsa0y7xDCGzki1kC3dLz?=
 =?us-ascii?Q?IbjtbpwpV5x6qE33Ty8xllOkCeObDB1jhrAV0SoqAzDgWJACNIQXuIumChTJ?=
 =?us-ascii?Q?uFp+OIhZRkQf2vznZH2nQQbz7WoLhX1X3aPh8no38u8+7OEKTUY4veBOhNvd?=
 =?us-ascii?Q?MfB7ZJ9UJrkHNgC9sZOUgez++SuJ0+9Dk/Jm9ToDQwr6+N1yYCY1c4ypQABN?=
 =?us-ascii?Q?JKJzc256tCMkZvnEBzOupqT4k/ESJsYvg1hrzFYozgGlCprm/q3rcuibwt5V?=
 =?us-ascii?Q?BpLCntM1FROXcUxaen4iNzVmRFvVA9o5tL9Y/HvQ8ulB/5gAeubMnrg1ZN73?=
 =?us-ascii?Q?eb0SjFKqjunTWLT45nOkChx0GTMPtds/O8wfNoCStlgkK1EWhivRpmITyTrH?=
 =?us-ascii?Q?h48fUQoxNymu6zqYkz/wpk1AUdLm9J5i7WodJ29zqjVfctNCEBz2bV/j9j2V?=
 =?us-ascii?Q?VIwUY8+OX+18c0vwRijg6mGi1JQN0onBUxQo8mDkFI6fLsIh44kUdW1pae6f?=
 =?us-ascii?Q?qMWSHEmkxGCrzrf+uFJ/kQnEn2bCcRQUaO04SoHOkmJmgMsQQnC+RsLqsV5r?=
 =?us-ascii?Q?wFpwt8rHPa2TOxShGMM0OiMxh0JmcYt05pnJksxjdMLAM5OCQ4Cwt1oTBF06?=
 =?us-ascii?Q?7As21SG0GyfBS5AKv+M5HU8rBf8gvLmY5l23nZ7LcYyfe5qDYmozLogexgqG?=
 =?us-ascii?Q?37hAUvmtRaLhz2xCq6+1Hijqcb8hcxA85bvAqct1?=
Content-Type: text/plain; charset="us-ascii"
Content-Transfer-Encoding: quoted-printable
MIME-Version: 1.0
X-MS-Exchange-CrossTenant-AuthAs: Internal
X-MS-Exchange-CrossTenant-AuthSource: SJ1PR11MB6083.namprd11.prod.outlook.com
X-MS-Exchange-CrossTenant-Network-Message-Id: 8b7d8ea8-6472-4ae6-9a8e-08db0478deb7
X-MS-Exchange-CrossTenant-originalarrivaltime: 01 Feb 2023 17:22:18.1749
 (UTC)
X-MS-Exchange-CrossTenant-fromentityheader: Hosted
X-MS-Exchange-CrossTenant-id: 46c98d88-e344-4ed4-8496-4ed7712e255d
X-MS-Exchange-CrossTenant-mailboxtype: HOSTED
X-MS-Exchange-CrossTenant-userprincipalname: FEtT/myYVPyhtDX8usBJj4K1N0d+dGFlFnGbdi60YJY5qM/vdQHB3ocJVFrDHKINgNTVhBnjDOuiTFI5KfU3VA==
X-MS-Exchange-Transport-CrossTenantHeadersStamped: SN7PR11MB6602
X-OriginatorOrg: intel.com
Precedence: bulk
List-ID: <linux-kernel.vger.kernel.org>
X-Mailing-List: linux-kernel@vger.kernel.org

> > +/* MSR_ARRAY_BIST bit fields */
> > +union ifs_array {
> > +   u64     data;
> > +   struct {
> > +           u32     array_bitmask           :32;
> > +           u32     array_bank              :16;
> > +           u32     rsvd                    :15;
> > +           u32     ctrl_result             :1;
>
> This isn't going to work well over time, just mask the bits you want off
> properly, don't rely on the compiler to lay them out like this.

What is this "time" issue?  This driver is X86_64 specific (and it seems
incredibly unlikely that some other architecture will copy this h/w
interface so closely that they want to re-use this driver. There's an x86_6=
4
ABI that says how bitfields in C are allocated. So should not break moving
to other C compilers.

Is there going to be a "re-write all drivers in Rust" edict coming soon?

> Note, we have bitmask and bitfield operations, please use them.

We do, but code written using them is not as easy to read (unless
you wrap in even more macros, which has its own maintainability
issues).

There are already thousands of bitfields in Linux kernel source:

$ git grep ':[1-9][0-9]*;' -- include/ | wc -l
2251

Has there been a change in attitude at the kernel maintainers summit?

-Tony