Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id 10388C636D4 for ; Thu, 2 Feb 2023 15:46:44 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S232909AbjBBPqn (ORCPT ); Thu, 2 Feb 2023 10:46:43 -0500 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:46260 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S232676AbjBBPqj (ORCPT ); Thu, 2 Feb 2023 10:46:39 -0500 Received: from mout.perfora.net (mout.perfora.net [74.208.4.197]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id 606E479F10; Thu, 2 Feb 2023 07:46:11 -0800 (PST) Received: from toolbox.int.toradex.com ([213.55.225.17]) by mrelay.perfora.net (mreueus003 [74.208.5.2]) with ESMTPSA (Nemesis) id 0M39aj-1oWry30hGx-00sz0K; Thu, 02 Feb 2023 16:32:40 +0100 From: Marcel Ziswiler To: devicetree@vger.kernel.org Cc: Liu Ying , linux-arm-kernel@lists.infradead.org, linux-kernel@vger.kernel.org, Krzysztof Kozlowski , linux-imx@nxp.com, Philippe Schenker , Max Krummenacher , Marcel Ziswiler , Fabio Estevam , Frank Li , Krzysztof Kozlowski , Peng Fan , Pengutronix Kernel Team , Rob Herring , Sascha Hauer , Shawn Guo Subject: [PATCH v6 01/10] arm64: dts: freescale: imx8-ss-lsio: add support for lsio_pwm0-3 Date: Thu, 2 Feb 2023 16:32:11 +0100 Message-Id: <20230202153221.197308-2-marcel@ziswiler.com> X-Mailer: git-send-email 2.36.1 In-Reply-To: <20230202153221.197308-1-marcel@ziswiler.com> References: <20230202153221.197308-1-marcel@ziswiler.com> MIME-Version: 1.0 Content-Transfer-Encoding: 8bit X-Provags-ID: V03:K1:/3RJuaQoBjtUwUKz+nDD7+GE854EU7GBR4gjXNFi5ueDkOxctzS gmucpCYqGteiDZ/WaeBabBzOV3wSQyLPMxf8+lcnWETWqz9i8M6C1UhAp0x35T6XEXy3CoC 7j47iwnpzoM1QJ5sBdLtDlBE08KPHy6OR4XglMbwl6AElKaNez91O/5bQjQOKm9gTbGF4c3 sWeg6Npq0u87jFJBD+0sw== UI-OutboundReport: notjunk:1;M01:P0:3c4bqiPX7JA=;mgGcMe3YmPJRxnY+ep6bEPyxWzj FNmTG5c9rXyiilXzcJYuJOvQDtiktvC0pMBXUwvl2X8auLPBth2WbOuT3jzEicMf7qPBLxBlj oB9lNYfkuqNIUgi7meOJeulsaHZx+m530S4lDlMiS/FVG4XnWGL2HWWoQ/WfInJrF7GL2HTBc FstF3WjgZeUh34H9hBwHHpPoA/DvNkqtyPsGOoPDGQHVAqxblKVXufu7ASayBH0NJLLCWfCkT QSX2KBuNUOlKS8MgXDeyGDKIynPG5GDnesucf/FXJeOnJYLmPV2Co6cinsKqIvA8/NYjK5k1x JMWo77O+EAf8Wg2g2w1JHSxl3Mt6S+p/7dpmT5lMJghlSTcgIRXwqvQD5MpdJCs0F3HgyYJsM ImzoJfFP1nEr8yavmlKZ+WQ71CAQGkxRrhlhTWxTeO+IkDkDbf/W8jqw1wXfaF2zUXOXXVwEB kxbzaPxmkdB4ByD9oLZJAEXbMXsoS0TNS2joezUayvNKXhIPiLET/xMpWviawl5KlgAL2cekt ypvZes83rR9rQQmUb6oTFymlW7ccujZ4i8aJGmm9udMnUcRh4KS+GFKLfIMzHCFfYN1YU2Evf CZjOobhVc/a9j2IIEGUhqLNs5chL0PcZWDVmWPp+d8UrkTAZY/duPId8jMJiDd9ZzDyCa2sml NBvKo25gJIFDWm9P2kEKn5oQtGOgTlgz6ICTzXVdGw== Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org From: Philippe Schenker Add support for lsio_pwm0-3. Signed-off-by: Philippe Schenker Signed-off-by: Max Krummenacher Signed-off-by: Marcel Ziswiler --- (no changes since v1) .../boot/dts/freescale/imx8-ss-lsio.dtsi | 48 +++++++++++++++++++ 1 file changed, 48 insertions(+) diff --git a/arch/arm64/boot/dts/freescale/imx8-ss-lsio.dtsi b/arch/arm64/boot/dts/freescale/imx8-ss-lsio.dtsi index 1f3d225e64ec..62b7f7a3e1bc 100644 --- a/arch/arm64/boot/dts/freescale/imx8-ss-lsio.dtsi +++ b/arch/arm64/boot/dts/freescale/imx8-ss-lsio.dtsi @@ -28,6 +28,54 @@ lsio_bus_clk: clock-lsio-bus { clock-output-names = "lsio_bus_clk"; }; + lsio_pwm0: pwm@5d000000 { + compatible = "fsl,imx27-pwm"; + reg = <0x5d000000 0x10000>; + clock-names = "ipg", "per"; + clocks = <&pwm0_lpcg 4>, + <&pwm0_lpcg 1>; + assigned-clocks = <&clk IMX_SC_R_PWM_0 IMX_SC_PM_CLK_PER>; + assigned-clock-rates = <24000000>; + #pwm-cells = <2>; + status = "disabled"; + }; + + lsio_pwm1: pwm@5d010000 { + compatible = "fsl,imx27-pwm"; + reg = <0x5d010000 0x10000>; + clock-names = "ipg", "per"; + clocks = <&pwm1_lpcg 4>, + <&pwm1_lpcg 1>; + assigned-clocks = <&clk IMX_SC_R_PWM_1 IMX_SC_PM_CLK_PER>; + assigned-clock-rates = <24000000>; + #pwm-cells = <2>; + status = "disabled"; + }; + + lsio_pwm2: pwm@5d020000 { + compatible = "fsl,imx27-pwm"; + reg = <0x5d020000 0x10000>; + clock-names = "ipg", "per"; + clocks = <&pwm2_lpcg 4>, + <&pwm2_lpcg 1>; + assigned-clocks = <&clk IMX_SC_R_PWM_2 IMX_SC_PM_CLK_PER>; + assigned-clock-rates = <24000000>; + #pwm-cells = <2>; + status = "disabled"; + }; + + lsio_pwm3: pwm@5d030000 { + compatible = "fsl,imx27-pwm"; + reg = <0x5d030000 0x10000>; + clock-names = "ipg", "per"; + clocks = <&pwm3_lpcg 4>, + <&pwm3_lpcg 1>; + assigned-clocks = <&clk IMX_SC_R_PWM_3 IMX_SC_PM_CLK_PER>; + assigned-clock-rates = <24000000>; + #pwm-cells = <2>; + status = "disabled"; + }; + lsio_gpio0: gpio@5d080000 { reg = <0x5d080000 0x10000>; interrupts = ; -- 2.36.1