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b=jIshPU/DQ6wxikguP+iFY8rtrJlr85T+UbxKX+vCgerbIPsvcaDXolUAsJQV0XnIHh99BhdjcU7ojdaqfrqLE7VYP7N+HUd7MEfIFEB1k1GyRVbozYrFyPL32FuqXMAByPQN76L+P08VxGnI277Acgz2zPJx/tToZn4l0oqDmFE= Received: from DU0PR04MB9417.eurprd04.prod.outlook.com (2603:10a6:10:358::11) by VE1PR04MB7424.eurprd04.prod.outlook.com (2603:10a6:800:1a7::20) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_256_GCM_SHA384) id 15.20.6064.27; Fri, 3 Feb 2023 00:12:15 +0000 Received: from DU0PR04MB9417.eurprd04.prod.outlook.com ([fe80::e203:47be:36e4:c0c3]) by DU0PR04MB9417.eurprd04.prod.outlook.com ([fe80::e203:47be:36e4:c0c3%9]) with mapi id 15.20.6043.025; Fri, 3 Feb 2023 00:12:15 +0000 From: Peng Fan To: Mathieu Poirier , "Peng Fan (OSS)" CC: "andersson@kernel.org" , "shawnguo@kernel.org" , "s.hauer@pengutronix.de" , "arnaud.pouliquen@foss.st.com" , "kernel@pengutronix.de" , "festevam@gmail.com" , dl-linux-imx , "linux-remoteproc@vger.kernel.org" , "linux-arm-kernel@lists.infradead.org" , "linux-kernel@vger.kernel.org" , Iuliana Prodan , Daniel Baluta Subject: RE: [PATCH V2 6/6] remoteproc: imx_rproc: set address of .interrupts section as bootaddr Thread-Topic: [PATCH V2 6/6] remoteproc: imx_rproc: set address of .interrupts section as bootaddr Thread-Index: AQHZMjDLa30Jfx3KJki7iAzCkmrKAq68QKuAgAAhn6A= Date: Fri, 3 Feb 2023 00:12:15 +0000 Message-ID: References: <20230127092246.1470865-1-peng.fan@oss.nxp.com> <20230127092246.1470865-7-peng.fan@oss.nxp.com> <20230202220557.GD1147631@p14s> In-Reply-To: <20230202220557.GD1147631@p14s> Accept-Language: en-US Content-Language: en-US X-MS-Has-Attach: X-MS-TNEF-Correlator: authentication-results: dkim=none (message not signed) header.d=none;dmarc=none action=none header.from=nxp.com; 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charset="us-ascii" Content-Transfer-Encoding: quoted-printable MIME-Version: 1.0 X-OriginatorOrg: nxp.com X-MS-Exchange-CrossTenant-AuthAs: Internal X-MS-Exchange-CrossTenant-AuthSource: DU0PR04MB9417.eurprd04.prod.outlook.com X-MS-Exchange-CrossTenant-Network-Message-Id: 1670733f-a315-4ffc-f800-08db057b4e31 X-MS-Exchange-CrossTenant-originalarrivaltime: 03 Feb 2023 00:12:15.3446 (UTC) X-MS-Exchange-CrossTenant-fromentityheader: Hosted X-MS-Exchange-CrossTenant-id: 686ea1d3-bc2b-4c6f-a92c-d99c5c301635 X-MS-Exchange-CrossTenant-mailboxtype: HOSTED X-MS-Exchange-CrossTenant-userprincipalname: K6PyeqKSK50aGAC/czcd7f/VR6rtVoyb2/pBKAUjbhrmCpfmsspgQ28N0U5uQs6z0Sadx9NjRjUPn9759AmL/w== X-MS-Exchange-Transport-CrossTenantHeadersStamped: VE1PR04MB7424 Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org > Subject: Re: [PATCH V2 6/6] remoteproc: imx_rproc: set address > of .interrupts section as bootaddr >=20 > On Fri, Jan 27, 2023 at 05:22:46PM +0800, Peng Fan (OSS) wrote: > > From: Peng Fan > > > > i.MX93 M33 has ROM, it needs the ".interrupts" section address to > > start > > M33 firmware. In current design, the Arm Trusted Firmware(ATF) use > > TCML start address when the 2nd arg is 0 when SMC call. So When the > > M33 firmware is built with TCML address, it works well. > > > > However when M33 firmware is built to run in DDR, we need pass the > > ".interrupts" address as 2nd arg to ATF to start M33 firmwrae. > > > > Signed-off-by: Peng Fan > > --- > > drivers/remoteproc/imx_rproc.c | 10 +++++++++- > > 1 file changed, 9 insertions(+), 1 deletion(-) > > > > diff --git a/drivers/remoteproc/imx_rproc.c > > b/drivers/remoteproc/imx_rproc.c index f5ee0c9bb09d..59cca5ac3045 > > 100644 > > --- a/drivers/remoteproc/imx_rproc.c > > +++ b/drivers/remoteproc/imx_rproc.c > > @@ -374,7 +374,8 @@ static int imx_rproc_start(struct rproc *rproc) > > dcfg->src_start); > > break; > > case IMX_RPROC_SMC: > > - arm_smccc_smc(IMX_SIP_RPROC, IMX_SIP_RPROC_START, 0, > 0, 0, 0, 0, 0, &res); > > + arm_smccc_smc(IMX_SIP_RPROC, IMX_SIP_RPROC_START, > rproc->bootaddr, > > + 0, 0, 0, 0, 0, &res); > > ret =3D res.a0; > > break; > > case IMX_RPROC_SCU_API: > > @@ -664,6 +665,13 @@ static u64 imx_rproc_get_boot_addr(struct rproc > *rproc, const struct firmware *f > > */ > > writel(*(u32 *)(elf_data + offset), va); > > writel(*(u32 *)(elf_data + offset + 4), va + 4); > > + } else if (priv->dcfg->devtype =3D=3D IMX_RPROC_IMX93) { > > + /* i.MX93 Cortex-M33 has ROM, it only needs the section > address */ > > + shdr =3D rproc_elf_find_shdr(rproc, fw, ".interrupts"); > > + if (!shdr) > > + return bootaddr; >=20 > This contradicts what you wrote in the cover letter of the patchset about= an > ".interrupts" section always being present. Yes, from the initial beginning for supporting Cortex-M firmware, the secti= on is there. I just think whether people build their own firmware, not has this section, and just put firmware in TCM, there is no need to explicitly = set word 0 and 4 again. This maybe a fake assumption, I could refine this piece code. >=20 > There is enough in this patchset to make me look for a second opinion. A= s > such I am CC'ing Iuliana and Daniel. Please respin this, adding both of = them > to the recipient list. I will do another revision only when they have pr= ovided > an RB tag. They not work on other areas, not same as me. Anyway I could ask them to help review.=20 Thanks, Peng. >=20 > Thanks, > Mathieu >=20 > > + > > + return elf_shdr_get_sh_addr(class, shdr); > > } > > > > return bootaddr; > > -- > > 2.37.1 > >