MIME-Version: 1.0
References: <20230119124848.26364-1-Garmin.Chang@mediatek.com> <20230119124848.26364-20-Garmin.Chang@mediatek.com>
In-Reply-To: <20230119124848.26364-20-Garmin.Chang@mediatek.com>
From:   Chen-Yu Tsai <wenst@chromium.org>
Date:   Fri, 3 Feb 2023 15:39:33 +0800
Message-ID: <CAGXv+5EW8DXXp+D_M1AU7ohrrbmU8e7eMwo5LpZb9FHWi7ELAw@mail.gmail.com>
Subject: Re: [PATCH v5 19/19] clk: mediatek: Add MT8188 adsp clock support
To:     "Garmin.Chang" <Garmin.Chang@mediatek.com>
Cc:     Matthias Brugger <matthias.bgg@gmail.com>,
        Rob Herring <robh+dt@kernel.org>,
        Krzysztof Kozlowski <krzysztof.kozlowski+dt@linaro.org>,
        Michael Turquette <mturquette@baylibre.com>,
        Stephen Boyd <sboyd@kernel.org>,
        Richard Cochran <richardcochran@gmail.com>,
        Project_Global_Chrome_Upstream_Group@mediatek.com,
        devicetree@vger.kernel.org, linux-arm-kernel@lists.infradead.org,
        linux-kernel@vger.kernel.org, linux-mediatek@lists.infradead.org,
        linux-clk@vger.kernel.org, netdev@vger.kernel.org
Content-Type: text/plain; charset="UTF-8"
Precedence: bulk

On Thu, Jan 19, 2023 at 9:02 PM Garmin.Chang <Garmin.Chang@mediatek.com> wrote:
>
> Add MT8188 adsp clock controller which provides clock gate
> control for Audio DSP.
>
> Signed-off-by: Garmin.Chang <Garmin.Chang@mediatek.com>
> ---
>  drivers/clk/mediatek/Makefile                 |  2 +-
>  .../clk/mediatek/clk-mt8188-adsp_audio26m.c   | 45 +++++++++++++++++++
>  2 files changed, 46 insertions(+), 1 deletion(-)
>  create mode 100644 drivers/clk/mediatek/clk-mt8188-adsp_audio26m.c
>
> diff --git a/drivers/clk/mediatek/Makefile b/drivers/clk/mediatek/Makefile
> index 8befaedfdd3d..b56ae9bee1d8 100644
> --- a/drivers/clk/mediatek/Makefile
> +++ b/drivers/clk/mediatek/Makefile
> @@ -89,7 +89,7 @@ obj-$(CONFIG_COMMON_CLK_MT8188) += clk-mt8188-apmixedsys.o clk-mt8188-topckgen.o
>                                    clk-mt8188-ipe.o clk-mt8188-mfg.o clk-mt8188-vdec.o \
>                                    clk-mt8188-vdo0.o clk-mt8188-vdo1.o clk-mt8188-venc.o \
>                                    clk-mt8188-vpp0.o clk-mt8188-vpp1.o clk-mt8188-wpe.o \
> -                                  clk-mt8188-imp_iic_wrap.o
> +                                  clk-mt8188-imp_iic_wrap.o clk-mt8188-adsp_audio26m.o
>  obj-$(CONFIG_COMMON_CLK_MT8192) += clk-mt8192.o
>  obj-$(CONFIG_COMMON_CLK_MT8192_AUDSYS) += clk-mt8192-aud.o
>  obj-$(CONFIG_COMMON_CLK_MT8192_CAMSYS) += clk-mt8192-cam.o
> diff --git a/drivers/clk/mediatek/clk-mt8188-adsp_audio26m.c b/drivers/clk/mediatek/clk-mt8188-adsp_audio26m.c
> new file mode 100644
> index 000000000000..f91381a1316c
> --- /dev/null
> +++ b/drivers/clk/mediatek/clk-mt8188-adsp_audio26m.c
> @@ -0,0 +1,45 @@
> +// SPDX-License-Identifier: GPL-2.0-only
> +//
> +// Copyright (c) 2022 MediaTek Inc.
> +// Author: Garmin Chang <garmin.chang@mediatek.com>
> +
> +#include <linux/clk-provider.h>
> +#include <linux/platform_device.h>
> +#include <dt-bindings/clock/mediatek,mt8188-clk.h>
> +
> +#include "clk-gate.h"
> +#include "clk-mtk.h"
> +
> +static const struct mtk_gate_regs adsp_audio26m_cg_regs = {
> +       .set_ofs = 0x80,
> +       .clr_ofs = 0x80,
> +       .sta_ofs = 0x80,
> +};
> +
> +#define GATE_ADSP_FLAGS(_id, _name, _parent, _shift)           \
> +       GATE_MTK_FLAGS(_id, _name, _parent, &adsp_audio26m_cg_regs, _shift,             \
> +               &mtk_clk_gate_ops_no_setclr, CLK_IGNORE_UNUSED)

Why CLK_IGNORE_UNUSED?