Message-ID: <6f6f1be3-358d-d062-31e1-c307dca56907@gmail.com>
Date:   Fri, 3 Feb 2023 13:31:58 +0100
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To:     Markus Schneider-Pargmann <msp@baylibre.com>,
        Rob Herring <robh+dt@kernel.org>,
        Krzysztof Kozlowski <krzysztof.kozlowski+dt@linaro.org>
Cc:     Chun-Jie Chen <chun-jie.chen@mediatek.com>,
        AngeloGioacchino Del Regno 
        <angelogioacchino.delregno@collabora.com>,
        Fabien Parent <parent.f@gmail.com>, devicetree@vger.kernel.org,
        linux-kernel@vger.kernel.org, linux-arm-kernel@lists.infradead.org,
        linux-mediatek@lists.infradead.org,
        Fabien Parent <fparent@baylibre.com>
References: <20230105170735.1637416-1-msp@baylibre.com>
 <20230105170735.1637416-2-msp@baylibre.com>
From:   Matthias Brugger <matthias.bgg@gmail.com>
Subject: Re: [PATCH 1/8] dt-bindings: power: Add MT8365 power domains
In-Reply-To: <20230105170735.1637416-2-msp@baylibre.com>
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On 05/01/2023 18:07, Markus Schneider-Pargmann wrote:
> From: Fabien Parent <fparent@baylibre.com>
> 
> Add power domains dt-bindings for MT8365.
> 
> Signed-off-by: Fabien Parent <fparent@baylibre.com>
> Signed-off-by: Markus Schneider-Pargmann <msp@baylibre.com>
> ---
> 
> Notes:
>      Changes in v4:
>      - Add infracfg_nao as it is used by mt8365
>      
>      Changes in v3:
>      - Renamed mt8365-power.h to mediatek,mt8365-power.h
>      
>      Changes in v2:
>      - Made include/dt-bindings/power/mt8365-power.h dual-license.
> 
>   .../power/mediatek,power-controller.yaml      |  6 ++++++
>   .../dt-bindings/power/mediatek,mt8365-power.h | 19 +++++++++++++++++++
>   2 files changed, 25 insertions(+)
>   create mode 100644 include/dt-bindings/power/mediatek,mt8365-power.h
> 
> diff --git a/Documentation/devicetree/bindings/power/mediatek,power-controller.yaml b/Documentation/devicetree/bindings/power/mediatek,power-controller.yaml
> index 605ec7ab5f63..a496c43cfa16 100644
> --- a/Documentation/devicetree/bindings/power/mediatek,power-controller.yaml
> +++ b/Documentation/devicetree/bindings/power/mediatek,power-controller.yaml
> @@ -30,6 +30,7 @@ properties:
>         - mediatek,mt8186-power-controller
>         - mediatek,mt8192-power-controller
>         - mediatek,mt8195-power-controller
> +      - mediatek,mt8365-power-controller
>   
>     '#power-domain-cells':
>       const: 1
> @@ -86,6 +87,7 @@ $defs:
>                 "include/dt-bindings/power/mt8183-power.h" - for MT8183 type power domain.
>                 "include/dt-bindings/power/mt8192-power.h" - for MT8192 type power domain.
>                 "include/dt-bindings/power/mt8195-power.h" - for MT8195 type power domain.
> +              "include/dt-bindings/power/mediatek,mt8365-power.h" - for MT8365 type power domain.
>           maxItems: 1
>   
>         clocks:
> @@ -113,6 +115,10 @@ $defs:
>           $ref: /schemas/types.yaml#/definitions/phandle
>           description: phandle to the device containing the INFRACFG register range.
>   
> +      mediatek,infracfg-nao:
> +        $ref: /schemas/types.yaml#/definitions/phandle
> +        description: phandle to the device containing the INFRACFG-NAO register range.
> +


Hm, so we have mediatek,mt8365-infracfg defined in mt8365-sys-clock. Also the 
description talks about infracfg_ao. You now introduce INFRACFG-NAO. Is that 
just another system clock block, or is this covered with the 
mediatek,mt8365-infracfg binding?

We would need to clean that up.

Regards,
Matthias

>         mediatek,smi:
>           $ref: /schemas/types.yaml#/definitions/phandle
>           description: phandle to the device containing the SMI register range.
> diff --git a/include/dt-bindings/power/mediatek,mt8365-power.h b/include/dt-bindings/power/mediatek,mt8365-power.h
> new file mode 100644
> index 000000000000..e6cfd0ec7871
> --- /dev/null
> +++ b/include/dt-bindings/power/mediatek,mt8365-power.h
> @@ -0,0 +1,19 @@
> +/* SPDX-License-Identifier: (GPL-2.0 OR MIT) */
> +/*
> + * Copyright (c) 2022 MediaTek Inc.
> + */
> +
> +#ifndef _DT_BINDINGS_POWER_MT8365_POWER_H
> +#define _DT_BINDINGS_POWER_MT8365_POWER_H
> +
> +#define MT8365_POWER_DOMAIN_MM		0
> +#define MT8365_POWER_DOMAIN_CONN	1
> +#define MT8365_POWER_DOMAIN_MFG		2
> +#define MT8365_POWER_DOMAIN_AUDIO	3
> +#define MT8365_POWER_DOMAIN_CAM		4
> +#define MT8365_POWER_DOMAIN_DSP		5
> +#define MT8365_POWER_DOMAIN_VDEC	6
> +#define MT8365_POWER_DOMAIN_VENC	7
> +#define MT8365_POWER_DOMAIN_APU		8
> +
> +#endif /* _DT_BINDINGS_POWER_MT8365_POWER_H */