Message-ID: <9c2c0e88-41d8-f9ec-d934-2d1752696b1a@kernel.org>
Date:   Fri, 3 Feb 2023 13:32:21 +0100
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Subject: Re: [PATCH 2/2] dt-bindings: PCI: mediatek-gen3: Add support for
 controlling power and reset
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To:     =?UTF-8?B?SmlhbiBZYW5nICjmnajmiKwp?= <Jian.Yang@mediatek.com>,
        "robh@kernel.org" <robh@kernel.org>,
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        "bhelgaas@google.com" <bhelgaas@google.com>,
        "lpieralisi@kernel.org" <lpieralisi@kernel.org>,
        Ryder Lee <Ryder.Lee@mediatek.com>
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        "linux-mediatek@lists.infradead.org" 
        <linux-mediatek@lists.infradead.org>,
        =?UTF-8?B?SmlleXkgWWFuZyAo5p2o5rSBKQ==?= <Jieyy.Yang@mediatek.com>,
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        <Rex-BC.Chen@mediatek.com>,
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References: <20230111032830.20447-1-jian.yang@mediatek.com>
 <20230111032830.20447-3-jian.yang@mediatek.com>
 <dccfa004-1d40-acc0-6220-9232193b648f@kernel.org>
 <8d954de7f9507099bd9bea6801f446f80bd832aa.camel@mediatek.com>
From:   Krzysztof Kozlowski <krzk@kernel.org>
In-Reply-To: <8d954de7f9507099bd9bea6801f446f80bd832aa.camel@mediatek.com>
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On 03/02/2023 10:38, Jian Yang (杨戬) wrote:
>>> +  pcie12v-supply:
>>> +    description:
>>> +      The regulator phandle that provides 12V power to downstream
>>> component.
>>> +
>>> +  dsc-reset-gpios:
>>> +    description:
>>> +      The reset GPIO of a downstream component.
>>
>> Why you cannot use standard reset-gpios property?
> 
> The "dsc-reset-gpios" represents an extra reset pin other than PERST#
> required by a PCIe downstream device. But the "reset-gpios", described
> in "pci.txt", represents the PERST#. So I tend to add a new property to
> meet this requirement.

OK

>>
>>> +    description:
>>> +      The delay time between assertion and de-assertion of a
>>> downstream
>>> +      component's reset GPIO.
>>
>> Why this should be a property of DT?
> 
> Same as the reason I described above. I suppose we need to add a
> property to let user determine the delay time due to differences
> in requirements between various devices.

No, I don't think we want individual properties like that. There is
ongoing discussion about this:
https://lore.kernel.org/all/20221214095342.937303-1-alexander.stein@ew.tq-group.com/

Feedback is welcomed - there. Don't create your own half-baked delays
for different hardware designs.

Best regards,
Krzysztof