Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id 65C95C636CC for ; Sat, 4 Feb 2023 15:42:04 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S233780AbjBDPmB (ORCPT ); Sat, 4 Feb 2023 10:42:01 -0500 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:35396 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S231176AbjBDPlz (ORCPT ); Sat, 4 Feb 2023 10:41:55 -0500 Received: from casper.infradead.org (casper.infradead.org [IPv6:2001:8b0:10b:1236::1]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id 09A8A2CC70; Sat, 4 Feb 2023 07:41:19 -0800 (PST) DKIM-Signature: v=1; a=rsa-sha256; q=dns/txt; c=relaxed/relaxed; d=infradead.org; s=casper.20170209; h=MIME-Version:Content-Type:References: In-Reply-To:Date:Cc:To:From:Subject:Message-ID:Sender:Reply-To: Content-Transfer-Encoding:Content-ID:Content-Description; bh=1eHM0D4Xc5qDXdgUkXoA7rkhIs3wyEXAp3BpMfG1Adc=; b=PqrC2rI1n7M0e6Xbf/2H4kOReQ /jAw0nMCjIaB0RqRDeh7oN4Z6VmA2EsxeIKQZIJeB1WkXWa01Tb0LAs6l4hb+MXlN64vYTPIufg4Q lGQW7ANultPJnZzy7SPK0jzFfTZGGG8V/A2nJafDdc+IzSQsYxPXegx7WoVAkK9hGYe2X4MU4liX+ fOstBZp3JrXqT9RR4jbMrOZkKmGLChW7l7jW9Ju37cC1TbGyg5+RGs96i8NLM0V45b7fo7PZmlQD1 y7BtB39Vwzt+TaTZKk/deGHjcyFdjymWO4SaAjgi3tybPPKfNfovBFZvagmSOztDyMFn1QYgNku0V ot34sLEQ==; Received: from [2001:8b0:10b:5::bb3] (helo=u3832b3a9db3152.infradead.org) by casper.infradead.org with esmtpsa (Exim 4.94.2 #2 (Red Hat Linux)) id 1pOKeX-00FG00-GL; Sat, 04 Feb 2023 15:40:34 +0000 Message-ID: Subject: Re: [PATCH v6 07/11] x86/smpboot: Disable parallel boot for AMD CPUs From: David Woodhouse To: Kim Phillips , Usama Arif , tglx@linutronix.de, arjan@linux.intel.com Cc: mingo@redhat.com, bp@alien8.de, dave.hansen@linux.intel.com, hpa@zytor.com, x86@kernel.org, pbonzini@redhat.com, paulmck@kernel.org, linux-kernel@vger.kernel.org, kvm@vger.kernel.org, rcu@vger.kernel.org, mimoja@mimoja.de, hewenliang4@huawei.com, thomas.lendacky@amd.com, seanjc@google.com, pmenzel@molgen.mpg.de, fam.zheng@bytedance.com, punit.agrawal@bytedance.com, simon.evans@bytedance.com, liangma@liangbit.com, Mario Limonciello Date: Sat, 04 Feb 2023 15:40:32 +0000 In-Reply-To: References: <20230202215625.3248306-1-usama.arif@bytedance.com> <20230202215625.3248306-8-usama.arif@bytedance.com> Content-Type: multipart/signed; micalg="sha-256"; protocol="application/pkcs7-signature"; boundary="=-3JGIyZ2UoF5mKzxRUUDY" User-Agent: Evolution 3.44.4-0ubuntu1 MIME-Version: 1.0 X-SRS-Rewrite: SMTP reverse-path rewritten from by casper.infradead.org. See http://www.infradead.org/rpr.html Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org --=-3JGIyZ2UoF5mKzxRUUDY Content-Type: text/plain; charset="UTF-8" Content-Transfer-Encoding: quoted-printable On Fri, 2023-02-03 at 13:48 -0600, Kim Phillips wrote: >=20 > I'd like to nack this, but can't (and not because it doesn't have > commit text) >=20 So, I *think* that worked precisely as designed; thanks for letting it grab your attention :) > If I: >=20 > =C2=A0 - take dwmw2's parallel-6.2-rc6 branch (commit 459d1c46dbd1) > =C2=A0 - remove the set_cpu_bug(c, X86_BUG_NO_PARALLEL_BRINGUP) line from= amd.c >=20 > Then: >=20 > =C2=A0 - a Ryzen 3000 (Picasso A1/Zen+) notebook I have access to fails t= o boot. > =C2=A0 - Zen 2,3,4-based servers boot fine > =C2=A0 - a Zen1-based server doesn't boot. I've changed it to use CPUID 0xb only if we're actually in x2apic mode, which Boris tells me won't be the case on Zen1 because that doesn't support X2APIC. When we're not in x2apic mode, we can use CPUID 0x1 because the 8 bits of APIC ID we find there are perfectly sufficient. New tree in the same place as before, commit ce7e2d1e046a for the parallel-6.2-rc6-part1 tag and 17bbd12ee03 for parallel-6.2-rc6. However... Even though we *can* support non-X2APIC processors, we *might* want to play it safe and not go back that far; only enabling parallel bringup on machines with X2APIC which roughly correlates with "lots of CPUs" since that's where the benefit is. --=-3JGIyZ2UoF5mKzxRUUDY Content-Type: application/pkcs7-signature; name="smime.p7s" Content-Disposition: attachment; filename="smime.p7s" Content-Transfer-Encoding: base64 MIAGCSqGSIb3DQEHAqCAMIACAQExDzANBglghkgBZQMEAgEFADCABgkqhkiG9w0BBwEAAKCCEkQw ggYQMIID+KADAgECAhBNlCwQ1DvglAnFgS06KwZPMA0GCSqGSIb3DQEBDAUAMIGIMQswCQYDVQQG EwJVUzETMBEGA1UECBMKTmV3IEplcnNleTEUMBIGA1UEBxMLSmVyc2V5IENpdHkxHjAcBgNVBAoT FVRoZSBVU0VSVFJVU1QgTmV0d29yazEuMCwGA1UEAxMlVVNFUlRydXN0IFJTQSBDZXJ0aWZpY2F0 aW9uIEF1dGhvcml0eTAeFw0xODExMDIwMDAwMDBaFw0zMDEyMzEyMzU5NTlaMIGWMQswCQYDVQQG EwJHQjEbMBkGA1UECBMSR3JlYXRlciBNYW5jaGVzdGVyMRAwDgYDVQQHEwdTYWxmb3JkMRgwFgYD VQQKEw9TZWN0aWdvIExpbWl0ZWQxPjA8BgNVBAMTNVNlY3RpZ28gUlNBIENsaWVudCBBdXRoZW50 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