Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id 28C7BC64EC4 for ; Tue, 7 Feb 2023 03:17:23 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S229875AbjBGDRV (ORCPT ); Mon, 6 Feb 2023 22:17:21 -0500 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:33966 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S229625AbjBGDRL (ORCPT ); Mon, 6 Feb 2023 22:17:11 -0500 Received: from mx0b-0031df01.pphosted.com (mx0b-0031df01.pphosted.com [205.220.180.131]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id 24201A5C9; Mon, 6 Feb 2023 19:16:47 -0800 (PST) Received: from pps.filterd (m0279869.ppops.net [127.0.0.1]) by mx0a-0031df01.pphosted.com (8.17.1.19/8.17.1.19) with ESMTP id 3172vb0Y006619; Tue, 7 Feb 2023 03:16:41 GMT DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=quicinc.com; h=message-id : date : mime-version : subject : to : cc : references : from : in-reply-to : content-type : content-transfer-encoding; s=qcppdkim1; bh=VNKMGJq3aTsZwyAi4yUoIk1k8gTppbCYaaDsylVzOZ8=; b=Qy+4ZfTDbVs9FNFaUVB8r5cf59WO2rpKT/fX+hLuAKLp3wvtBrldLnZnnX6V0M9RWGm5 4rJvO39As78IOtgkz7KUf4/4ChoJLuxzUd5MRRpTq1YDxPjpLW/cqlj1YckhMMItMHK2 QvSEDVXSNKN2qp5gnZBZwhjwy/+lbjl0VrgIt2PUHG8shQXysMOoXAbX4eC7Ozvxvmtn 0r0rW+26zGWXZjpS271zCzZZzSBbQQCGQk3m0Bqrgj5PSgkoPq19UfdheKXWRQUF/AZ2 cXKW1rhViarjISt9e0YlnoyttmPAWFk1qJ4ZbrQK8Q5y6kFWcazFBPTaygarzcPj35FY 2A== Received: from nasanppmta04.qualcomm.com (i-global254.qualcomm.com [199.106.103.254]) by mx0a-0031df01.pphosted.com (PPS) with ESMTPS id 3nhechdeg2-1 (version=TLSv1.2 cipher=ECDHE-RSA-AES256-GCM-SHA384 bits=256 verify=NOT); Tue, 07 Feb 2023 03:16:41 +0000 Received: from nasanex01b.na.qualcomm.com (nasanex01b.na.qualcomm.com [10.46.141.250]) by NASANPPMTA04.qualcomm.com (8.17.1.5/8.17.1.5) with ESMTPS id 3173Geia005561 (version=TLSv1.2 cipher=ECDHE-RSA-AES256-GCM-SHA384 bits=256 verify=NOT); Tue, 7 Feb 2023 03:16:40 GMT Received: from [10.47.206.1] (10.49.16.6) by nasanex01b.na.qualcomm.com (10.46.141.250) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_256_GCM_SHA384) id 15.2.986.36; Mon, 6 Feb 2023 19:16:39 -0800 Message-ID: Date: Mon, 6 Feb 2023 19:16:37 -0800 MIME-Version: 1.0 User-Agent: Mozilla/5.0 (X11; Linux x86_64; rv:102.0) Gecko/20100101 Thunderbird/102.4.2 Subject: Re: [PATCH v2 16/22] dt-bindings: rtc: qcom-pm8xxx: add nvmem-cell offset Content-Language: en-US To: Johan Hovold , Alexandre Belloni , Bjorn Andersson CC: Andy Gross , Konrad Dybcio , Alessandro Zummo , Rob Herring , Krzysztof Kozlowski , Maximilian Luz , , , , , Krzysztof Kozlowski References: <20230202155448.6715-1-johan+linaro@kernel.org> <20230202155448.6715-17-johan+linaro@kernel.org> From: David Collins In-Reply-To: <20230202155448.6715-17-johan+linaro@kernel.org> Content-Type: text/plain; charset="UTF-8" Content-Transfer-Encoding: 7bit X-Originating-IP: [10.49.16.6] X-ClientProxiedBy: nalasex01b.na.qualcomm.com (10.47.209.197) To nasanex01b.na.qualcomm.com (10.46.141.250) X-QCInternal: smtphost X-Proofpoint-Virus-Version: vendor=nai engine=6200 definitions=5800 signatures=585085 X-Proofpoint-GUID: TM2DUCNpWaY_0YEwhxLwM8jsroCirQPV X-Proofpoint-ORIG-GUID: TM2DUCNpWaY_0YEwhxLwM8jsroCirQPV X-Proofpoint-Virus-Version: vendor=baseguard engine=ICAP:2.0.219,Aquarius:18.0.930,Hydra:6.0.562,FMLib:17.11.122.1 definitions=2023-02-06_07,2023-02-06_03,2022-06-22_01 X-Proofpoint-Spam-Details: rule=outbound_notspam policy=outbound score=0 clxscore=1015 impostorscore=0 adultscore=0 spamscore=0 lowpriorityscore=0 bulkscore=0 malwarescore=0 mlxlogscore=980 priorityscore=1501 mlxscore=0 phishscore=0 suspectscore=0 classifier=spam adjust=0 reason=mlx scancount=1 engine=8.12.0-2212070000 definitions=main-2302070028 Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org On 2/2/23 07:54, Johan Hovold wrote: > On many Qualcomm platforms the PMIC RTC control and time registers are > read-only so that the RTC time can not be updated. Instead an offset s/can not/cannot/ > needs be stored in some machine-specific non-volatile memory, which a > driver can take into account. > > Add an 'offset' nvmem cell which can be used to store a 32-bit offset > from the Unix epoch so that the RTC time can be updated on such > platforms. > > Acked-by: Krzysztof Kozlowski > Signed-off-by: Johan Hovold > --- > .../devicetree/bindings/rtc/qcom-pm8xxx-rtc.yaml | 12 ++++++++++++ > 1 file changed, 12 insertions(+) Assuming that the minor commit text comment above is addressed: Reviewed-by: David Collins Take care, David