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References: <20230206152928.918562-1-angelogioacchino.delregno@collabora.com> <20230206152928.918562-13-angelogioacchino.delregno@collabora.com>
In-Reply-To: <20230206152928.918562-13-angelogioacchino.delregno@collabora.com>
From:   Chen-Yu Tsai <wenst@chromium.org>
Date:   Tue, 7 Feb 2023 15:28:35 +0800
Message-ID: <CAGXv+5G0+pbgz_6ajWOYNLYMOn4a9+pmPKFngUCrQEtwZe8vVg@mail.gmail.com>
Subject: Re: [PATCH v1 12/45] clk: mediatek: mt8365: Convert to mtk_clk_simple_{probe,remove}()
To:     AngeloGioacchino Del Regno 
        <angelogioacchino.delregno@collabora.com>
Cc:     mturquette@baylibre.com, sboyd@kernel.org, matthias.bgg@gmail.com,
        johnson.wang@mediatek.com, miles.chen@mediatek.com,
        chun-jie.chen@mediatek.com, daniel@makrotopia.org,
        fparent@baylibre.com, msp@baylibre.com, nfraprado@collabora.com,
        rex-bc.chen@mediatek.com, zhaojh329@gmail.com,
        sam.shih@mediatek.com, edward-jw.yang@mediatek.com,
        yangyingliang@huawei.com, granquet@baylibre.com,
        pablo.sun@mediatek.com, sean.wang@mediatek.com,
        chen.zhong@mediatek.com, linux-kernel@vger.kernel.org,
        linux-clk@vger.kernel.org, linux-arm-kernel@lists.infradead.org,
        linux-mediatek@lists.infradead.org
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On Mon, Feb 6, 2023 at 11:30 PM AngeloGioacchino Del Regno
<angelogioacchino.delregno@collabora.com> wrote:
>
> Change the custom mt8365_simple_gate to be mtk_gate clocks and
> audio clocks to be composites to be consistent with all of the
> other MediaTek clock drivers, allowing to convert this entire
> driver to use the common mtk_clk_simple_probe() mechanism that
> also allows building this driver as module.

I think this would be easier to follow if it were split in half:
the first half migrating mt8365_simple_gate to mtk_gate, and the
second half converting to mtk_clk_simple_probe.

I assume git would generate better diffs after that.

> While at it, also perform some macro compression cleanups and
> switch to use module_platform_driver().

This would get split in half as well. The macro cleanups go with the
first half, and the switch to module_platform_driver goes with the
second.

> Signed-off-by: AngeloGioacchino Del Regno <angelogioacchino.delregno@collabora.com>
> ---
>  drivers/clk/mediatek/clk-mt8365.c | 460 ++++++++----------------------
>  1 file changed, 124 insertions(+), 336 deletions(-)
>
> diff --git a/drivers/clk/mediatek/clk-mt8365.c b/drivers/clk/mediatek/clk-mt8365.c
> index 69f293497778..4bd624884b62 100644
> --- a/drivers/clk/mediatek/clk-mt8365.c
> +++ b/drivers/clk/mediatek/clk-mt8365.c
> @@ -1,6 +1,7 @@
>  // SPDX-License-Identifier: GPL-2.0
>  /*
>   * Copyright (C) 2022 MediaTek Inc.
> + * Copyright (C) 2023 Collabora Ltd.
>   */
>
>  #include <dt-bindings/clock/mediatek,mt8365-clk.h>
> @@ -17,7 +18,6 @@
>  #include "clk-gate.h"
>  #include "clk-mtk.h"
>  #include "clk-mux.h"
> -#include "clk-pll.h"

This should be in the previous patch?

Could you also remove some of the other inclusions that don't get
referenced after this patch?

>  static DEFINE_SPINLOCK(mt8365_clk_lock);
>
> @@ -383,31 +383,23 @@ static const char * const mbist_diag_parents[] = {
>         "univpll2_d8"
>  };
>
> -static const char * const apll_i2s0_parents[] = {
> +static const char * const apll_i2s_parents[] = {

Misc. unmentioned change. It makes sense, but please mention it.

ChenYu