Message-ID: <326154c5-0a78-31c0-2d70-1ef4a8a0c1bb@collabora.com>
Date:   Tue, 7 Feb 2023 16:22:45 +0100
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Subject: Re: [PATCH v1 29/45] clk: mediatek: mt7986-apmixed: Use PLL_AO flag
 to set critical clock
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To:     Daniel Golle <daniel@makrotopia.org>
Cc:     mturquette@baylibre.com, sboyd@kernel.org, matthias.bgg@gmail.com,
        wenst@chromium.org, johnson.wang@mediatek.com,
        miles.chen@mediatek.com, chun-jie.chen@mediatek.com,
        fparent@baylibre.com, msp@baylibre.com, nfraprado@collabora.com,
        rex-bc.chen@mediatek.com, zhaojh329@gmail.com,
        sam.shih@mediatek.com, edward-jw.yang@mediatek.com,
        yangyingliang@huawei.com, granquet@baylibre.com,
        pablo.sun@mediatek.com, sean.wang@mediatek.com,
        chen.zhong@mediatek.com, linux-kernel@vger.kernel.org,
        linux-clk@vger.kernel.org, linux-arm-kernel@lists.infradead.org,
        linux-mediatek@lists.infradead.org
References: <20230206152928.918562-1-angelogioacchino.delregno@collabora.com>
 <20230206152928.918562-30-angelogioacchino.delregno@collabora.com>
 <Y+JjjLLYoOgSlG55@makrotopia.org>
From:   AngeloGioacchino Del Regno 
        <angelogioacchino.delregno@collabora.com>
In-Reply-To: <Y+JjjLLYoOgSlG55@makrotopia.org>
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Precedence: bulk

Il 07/02/23 15:43, Daniel Golle ha scritto:
> 
> On Mon, Feb 06, 2023 at 04:29:12PM +0100, AngeloGioacchino Del Regno wrote:
>> Instead of calling clk_prepare_enable() at probe time, add the PLL_AO
>> flag to CLK_APMIXED_ARMPLL clock: this will set CLK_IS_CRITICAL.
> 
> I've been preparing a similar change, but also splitting-off the
> apmixed part from dt headers into a file of its own, so that one of now
> identical drivers for MT7986 and MT7981 can be removed in favor of a
> shared driver.
> Should I propose this on top of this series or can you make this change?
> 
> 

That's cool!!! I'm not comfortable in stealing the idea, that's all yours.
Please go on with basing it on top of my series, but wait a couple of days
before doing that, as I have to send a v2 of this one and that'll happen
in the next one..or two days.

Cheers!
Angelo

>>
>> Signed-off-by: AngeloGioacchino Del Regno <angelogioacchino.delregno@collabora.com>
>> ---
>>   drivers/clk/mediatek/clk-mt7986-apmixed.c | 4 +---
>>   1 file changed, 1 insertion(+), 3 deletions(-)
>>
>> diff --git a/drivers/clk/mediatek/clk-mt7986-apmixed.c b/drivers/clk/mediatek/clk-mt7986-apmixed.c
>> index 62080ee4dbe3..227ca572056e 100644
>> --- a/drivers/clk/mediatek/clk-mt7986-apmixed.c
>> +++ b/drivers/clk/mediatek/clk-mt7986-apmixed.c
>> @@ -42,7 +42,7 @@
>>   		 "clkxtal")
>>   
>>   static const struct mtk_pll_data plls[] = {
>> -	PLL(CLK_APMIXED_ARMPLL, "armpll", 0x0200, 0x020C, 0x0, 0, 32,
>> +	PLL(CLK_APMIXED_ARMPLL, "armpll", 0x0200, 0x020C, 0x0, PLL_AO, 32,
>>   	    0x0200, 4, 0, 0x0204, 0),
>>   	PLL(CLK_APMIXED_NET2PLL, "net2pll", 0x0210, 0x021C, 0x0, 0, 32,
>>   	    0x0210, 4, 0, 0x0214, 0),
>> @@ -77,8 +77,6 @@ static int clk_mt7986_apmixed_probe(struct platform_device *pdev)
>>   
>>   	mtk_clk_register_plls(node, plls, ARRAY_SIZE(plls), clk_data);
>>   
>> -	clk_prepare_enable(clk_data->hws[CLK_APMIXED_ARMPLL]->clk);
>> -
>>   	r = of_clk_add_hw_provider(node, of_clk_hw_onecell_get, clk_data);
>>   	if (r) {
>>   		pr_err("%s(): could not register clock provider: %d\n",
>> -- 
>> 2.39.1
>>
>>