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charset="us-ascii" Content-Transfer-Encoding: quoted-printable MIME-Version: 1.0 X-OriginatorOrg: microsoft.com X-MS-Exchange-CrossTenant-AuthAs: Internal X-MS-Exchange-CrossTenant-AuthSource: BYAPR21MB1688.namprd21.prod.outlook.com X-MS-Exchange-CrossTenant-Network-Message-Id: 60684c1e-175e-4cef-7e2a-08db0970682c X-MS-Exchange-CrossTenant-originalarrivaltime: 08 Feb 2023 01:04:19.1478 (UTC) X-MS-Exchange-CrossTenant-fromentityheader: Hosted X-MS-Exchange-CrossTenant-id: 72f988bf-86f1-41af-91ab-2d7cd011db47 X-MS-Exchange-CrossTenant-mailboxtype: HOSTED X-MS-Exchange-CrossTenant-userprincipalname: YH2qtu+W9QXPUJL/qJSL5NT0ZP5Lw2FYxZ1gk/QF40emL/bZs34Sp5JmcSQaKdTBjRpGzpi8H366mTtTTEmKLDpS1F0iDvFmjkfKvreEc1Y= X-MS-Exchange-Transport-CrossTenantHeadersStamped: DM4PR21MB3441 Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org From: lirongqing@baidu.com Sent: Monday, February 6,= 2023 5:15 PM >=20 > Zeroing the counter register in pit_shutdown() isn't actually supposed to > stop it from counting, will causes the PIT to start running again, > From the spec: >=20 > The largest possible initial count is 0; this is equivalent to 216 for > binary counting and 104 for BCD counting. >=20 > The Counter does not stop when it reaches zero. In Modes 0, 1, 4, and 5= the > Counter "wraps around" to the highest count, either FFFF hex for binary > count- ing or 9999 for BCD counting, and continues counting. >=20 > Mode 0 is typically used for event counting. After the Control Word is > written, OUT is initially low, and will remain low until the Counter > reaches zero. OUT then goes high and remains high until a new count or = a > new Mode 0 Control Word is written into the Counter. >=20 > Hyper-V and KVM follow the spec, the issue that 35b69a42 "(clockevents/dr= ivers/ > i8253: Add support for PIT shutdown quirk") fixed is in i8253 drivers, no= t Hyper-v, > so delete the zero timer counter register in shutdown, and delete PIT shu= tdown > quirk for Hyper-v From the standpoint of Hyper-V, I'm good with this change. But there's a risk that old hardware might not be compliant with the spec, and needs the zero'ing for some reason. The experts in the x86 space will be in the best position to assess the risk. At the time, the quirk approach was taken so the change applied only to Hyper-V, and any such risk was avoided. For Hyper-V, Reviewed-by: Michael Kelley >=20 > Suggested-by: Sean Christopherson > Signed-off-by: Li RongQing > --- > arch/x86/kernel/cpu/mshyperv.c | 11 ----------- > drivers/clocksource/i8253.c | 12 ------------ > include/linux/i8253.h | 1 - > 3 files changed, 24 deletions(-) >=20 > diff --git a/arch/x86/kernel/cpu/mshyperv.c b/arch/x86/kernel/cpu/mshyper= v.c > index 46668e2..f788889 100644 > --- a/arch/x86/kernel/cpu/mshyperv.c > +++ b/arch/x86/kernel/cpu/mshyperv.c > @@ -16,7 +16,6 @@ > #include > #include > #include > -#include > #include > #include > #include > @@ -399,16 +398,6 @@ static void __init ms_hyperv_init_platform(void) > if (efi_enabled(EFI_BOOT)) > x86_platform.get_nmi_reason =3D hv_get_nmi_reason; >=20 > - /* > - * Hyper-V VMs have a PIT emulation quirk such that zeroing the > - * counter register during PIT shutdown restarts the PIT. So it > - * continues to interrupt @18.2 HZ. Setting i8253_clear_counter > - * to false tells pit_shutdown() not to zero the counter so that > - * the PIT really is shutdown. Generation 2 VMs don't have a PIT, > - * and setting this value has no effect. > - */ > - i8253_clear_counter_on_shutdown =3D false; > - > #if IS_ENABLED(CONFIG_HYPERV) > /* > * Setup the hook to get control post apic initialization. > diff --git a/drivers/clocksource/i8253.c b/drivers/clocksource/i8253.c > index d4350bb..169474d 100644 > --- a/drivers/clocksource/i8253.c > +++ b/drivers/clocksource/i8253.c > @@ -20,13 +20,6 @@ > DEFINE_RAW_SPINLOCK(i8253_lock); > EXPORT_SYMBOL(i8253_lock); >=20 > -/* > - * Handle PIT quirk in pit_shutdown() where zeroing the counter register > - * restarts the PIT, negating the shutdown. On platforms with the quirk, > - * platform specific code can set this to false. > - */ > -bool i8253_clear_counter_on_shutdown __ro_after_init =3D true; > - > #ifdef CONFIG_CLKSRC_I8253 > /* > * Since the PIT overflows every tick, its not very useful > @@ -117,11 +110,6 @@ static int pit_shutdown(struct clock_event_device *e= vt) >=20 > outb_p(0x30, PIT_MODE); >=20 > - if (i8253_clear_counter_on_shutdown) { > - outb_p(0, PIT_CH0); > - outb_p(0, PIT_CH0); > - } > - > raw_spin_unlock(&i8253_lock); > return 0; > } > diff --git a/include/linux/i8253.h b/include/linux/i8253.h > index 8336b2f..e6bb36a 100644 > --- a/include/linux/i8253.h > +++ b/include/linux/i8253.h > @@ -21,7 +21,6 @@ > #define PIT_LATCH ((PIT_TICK_RATE + HZ/2) / HZ) >=20 > extern raw_spinlock_t i8253_lock; > -extern bool i8253_clear_counter_on_shutdown; > extern struct clock_event_device i8253_clockevent; > extern void clockevent_i8253_init(bool oneshot); >=20 > -- > 2.9.4