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From:   Robert Richter <rrichter@amd.com>
To:     Alison Schofield <alison.schofield@intel.com>,
        Vishal Verma <vishal.l.verma@intel.com>,
        Ira Weiny <ira.weiny@intel.com>,
        Ben Widawsky <bwidawsk@kernel.org>,
        Dan Williams <dan.j.williams@intel.com>
CC:     Jonathan Cameron <jonathan.cameron@huawei.com>,
        Dave Jiang <dave.jiang@intel.com>,
        Robert Richter <rrichter@amd.com>, <linux-cxl@vger.kernel.org>,
        <linux-kernel@vger.kernel.org>
Subject: [PATCH] cxl/port: Disable decoder setup for endpoints in RCD mode
Date:   Wed, 8 Feb 2023 08:17:58 +0100
Message-ID: <20230208071758.658652-1-rrichter@amd.com>
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In RCD mode the HDM decoder capability is optional for endpoints and
may not exist. The HDM range registers are used instead. Since the
driver relies on the existence of an HDM decoder capability, its
absence will cause the initialization of a memory card to fail.

Moreover, the driver also tries to enable or reuse enabled memory
ranges. In the worst case this may lead to a system hang due to
disabling system memory that was previously provided and setup by
system firmware.

To solve the issues described, disable decoder setup for RCD endpoints
and instead rely exclusively on system firmware to enable those memory
ranges. Decoders are used by the kernel to setup and configure CXL
memory regions, esp. to enable and disable them. Since Hot-plug is not
supported for devices in RCD mode, the ability to disable that memory
by the kernel using a decoder is not a necessarily requirement,
decoders are not needed then.

Fixes: 34e37b4c432c ("cxl/port: Enable HDM Capability after validating DVSEC Ranges")
Signed-off-by: Robert Richter <rrichter@amd.com>
---
 drivers/cxl/port.c | 21 +++++++++++++++++----
 1 file changed, 17 insertions(+), 4 deletions(-)

diff --git a/drivers/cxl/port.c b/drivers/cxl/port.c
index 5453771bf330..19591d904bdf 100644
--- a/drivers/cxl/port.c
+++ b/drivers/cxl/port.c
@@ -43,11 +43,11 @@ static int cxl_port_probe(struct device *dev)
 			return rc;
 		if (rc == 1)
 			return devm_cxl_add_passthrough_decoder(port);
-	}
 
-	cxlhdm = devm_cxl_setup_hdm(port);
-	if (IS_ERR(cxlhdm))
-		return PTR_ERR(cxlhdm);
+		cxlhdm = devm_cxl_setup_hdm(port);
+		if (IS_ERR(cxlhdm))
+			return PTR_ERR(cxlhdm);
+	}
 
 	if (is_cxl_endpoint(port)) {
 		struct cxl_memdev *cxlmd = to_cxl_memdev(port->uport);
@@ -61,6 +61,19 @@ static int cxl_port_probe(struct device *dev)
 		if (rc)
 			return rc;
 
+		/*
+		 * The HDM decoder capability may not exist. Do not
+		 * use decoders in RCD mode, instead rely on firmware
+		 * to setup the range or decoder registers and to
+		 * enable memory.
+		 */
+		if (cxlds->rcd)
+			return cxl_await_media_ready(cxlds);
+
+		cxlhdm = devm_cxl_setup_hdm(port);
+		if (IS_ERR(cxlhdm))
+			return PTR_ERR(cxlhdm);
+
 		rc = cxl_hdm_decode_init(cxlds, cxlhdm);
 		if (rc)
 			return rc;

base-commit: 623c0751336e4035ab0047f2c152a02bd26b612b
-- 
2.30.2