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Wed, 8 Feb 2023 03:17:08 -0800 From: Manikanta Maddireddy To: , , , , , , CC: , , , , , , , , , , , , , Manikanta Maddireddy Subject: [RFC,v14 1/5] dt-bindings: PCI: Add definition of PCIe WAKE# irq and PCI irq Date: Wed, 8 Feb 2023 16:46:41 +0530 Message-ID: <20230208111645.3863534-2-mmaddireddy@nvidia.com> X-Mailer: git-send-email 2.25.1 In-Reply-To: <20230208111645.3863534-1-mmaddireddy@nvidia.com> References: <20230208111645.3863534-1-mmaddireddy@nvidia.com> MIME-Version: 1.0 X-NVConfidentiality: public Content-Transfer-Encoding: 8bit Content-Type: text/plain X-EOPAttributedMessage: 0 X-MS-PublicTrafficType: Email X-MS-TrafficTypeDiagnostic: BN8NAM11FT038:EE_|PH8PR12MB6868:EE_ X-MS-Office365-Filtering-Correlation-Id: 0021138e-f15f-4e10-dbbc-08db09c6112b X-MS-Exchange-SenderADCheck: 1 X-MS-Exchange-AntiSpam-Relay: 0 X-Microsoft-Antispam: BCL:0; X-Microsoft-Antispam-Message-Info: NDqWAlE9uGeN/HJnROXHSSmOsDMZ4yDYCF4T4HKouTPoIXXBo4rKX4GUDove2rT0teBfsDLCCDJPeDXJu09XBU+detL3q4/DMEi71/rmN1PsOj/BS5FlipL7XiDEaQLtr+x+cKlDaIVA3I89oWS7hy98vQ1UzW76j0vgJJJL0NxGJvL1BtkJr0+5QFzC5IvmxpT0Hv/qwkqZuZt56jr78/lFsc90TqeLmFjSjaObsCqQuoqV4vBiW73F6dlHfffK0+HIsuYivwfsFiMDtdEHKaJq11UKL5ggC4kwC/ps9anYuPbwNVZBw9McXSksNyBNQvlLCO0AOLxQXh0XiOZOseTdky7cYD7ifQMQ/K8Ts2kEXtBajoOzq54ys/B0Ukt40zcZ6XqpeSHkk84UyqmqkSpIQ767/RlMl5OLYJzyjcCodjkcM4G4AVlqNm7C+e1bky93pURQ+P3O4PwsrXu3TohA1ohlDDbhpFLecbARNX11Id5iNwIDmVTo5TUZBqx2M/4l2OvufHRoOq/i0cnzFECUrU1eZlcqVwifh8rWnO0VisO1CXqTcgLM7fEl/BpFJ7UIRupxrt/l5gPrZJeQoJLIeymUM8XcR4QjB8rdi7cF9OUAeIdMJw8r/6sBT7RklgzME/yGbkm2s12nXAevm1kvjHE2WudkaQDR8TqaihIvsnFcAj8QBR7bpSDHStNyUqb3kemlSBBkrleEAL5Lqw== X-Forefront-Antispam-Report: CIP:216.228.117.161;CTRY:US;LANG:en;SCL:1;SRV:;IPV:NLI;SFV:NSPM;H:mail.nvidia.com;PTR:dc6edge2.nvidia.com;CAT:NONE;SFS:(13230025)(4636009)(136003)(396003)(376002)(346002)(39860400002)(451199018)(36840700001)(40470700004)(46966006)(82310400005)(83380400001)(426003)(36756003)(86362001)(2906002)(8936002)(7416002)(5660300002)(4326008)(70206006)(40480700001)(8676002)(70586007)(41300700001)(356005)(7636003)(316002)(82740400003)(36860700001)(110136005)(54906003)(47076005)(6666004)(107886003)(40460700003)(7696005)(336012)(2616005)(1076003)(478600001)(26005)(186003);DIR:OUT;SFP:1101; X-OriginatorOrg: Nvidia.com X-MS-Exchange-CrossTenant-OriginalArrivalTime: 08 Feb 2023 11:17:29.7287 (UTC) X-MS-Exchange-CrossTenant-Network-Message-Id: 0021138e-f15f-4e10-dbbc-08db09c6112b X-MS-Exchange-CrossTenant-Id: 43083d15-7273-40c1-b7db-39efd9ccc17a X-MS-Exchange-CrossTenant-OriginalAttributedTenantConnectingIp: TenantId=43083d15-7273-40c1-b7db-39efd9ccc17a;Ip=[216.228.117.161];Helo=[mail.nvidia.com] X-MS-Exchange-CrossTenant-AuthSource: BN8NAM11FT038.eop-nam11.prod.protection.outlook.com X-MS-Exchange-CrossTenant-AuthAs: Anonymous X-MS-Exchange-CrossTenant-FromEntityHeader: HybridOnPrem X-MS-Exchange-Transport-CrossTenantHeadersStamped: PH8PR12MB6868 Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org From: Jeffy Chen Add device tree support to pass PCIe WAKE# pin information to PCI core driver. To support PCIe WAKE# and PCI irqs, add definition of the optional properties "interrupts" and "interrupt-names". These properties should be defined by the PCIe port to which wake capable Endpoint is connected, so the definition is added under "PCI-PCI Bridge properties" section. Signed-off-by: Jeffy Chen Signed-off-by: Manikanta Maddireddy Reviewed-by: Rob Herring --- Changes in v14: Move the device tree properties definition to "PCI-PCI Bridge properties" section and also update commit message. Changes in v13: None Changes in v12: Only add irq definitions for PCI devices and rewrite the commit message. Changes in v11: None Changes in v10: None Changes in v9: Add section for PCI devices and rewrite the commit message. Changes in v8: Add optional "pci", and rewrite commit message. Changes in v7: None Changes in v6: None Changes in v5: Move to pci.txt Changes in v3: None Changes in v2: None Documentation/devicetree/bindings/pci/pci.txt | 8 ++++++++ 1 file changed, 8 insertions(+) diff --git a/Documentation/devicetree/bindings/pci/pci.txt b/Documentation/devicetree/bindings/pci/pci.txt index 6a8f2874a24d..53bd559a7305 100644 --- a/Documentation/devicetree/bindings/pci/pci.txt +++ b/Documentation/devicetree/bindings/pci/pci.txt @@ -71,6 +71,14 @@ Optional properties: trusted with relaxed DMA protection, as users could easily attach malicious devices to this port. +- interrupts: Interrupt specifier for each name in interrupt-names. +- interrupt-names: + May contain "wakeup" for PCIe WAKE# interrupt and "pci" for PCI interrupt. + The PCI devices may optionally include an 'interrupts' property that + represents the legacy PCI interrupt. And when we try to specify the PCIe + WAKE# pin, a corresponding 'interrupt-names' property is required to + distinguish them. + Example: pcie@10000000 { -- 2.25.1