Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id 4BF3FC61DA4 for ; Thu, 9 Feb 2023 11:20:18 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S230414AbjBILUQ (ORCPT ); Thu, 9 Feb 2023 06:20:16 -0500 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:43056 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S230425AbjBILTH (ORCPT ); Thu, 9 Feb 2023 06:19:07 -0500 Received: from dfw.source.kernel.org (dfw.source.kernel.org [IPv6:2604:1380:4641:c500::1]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id 3984557761; Thu, 9 Feb 2023 03:17:08 -0800 (PST) Received: from smtp.kernel.org (relay.kernel.org [52.25.139.140]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by dfw.source.kernel.org (Postfix) with ESMTPS id 099B261A18; Thu, 9 Feb 2023 11:17:07 +0000 (UTC) Received: by smtp.kernel.org (Postfix) with ESMTPSA id 78C07C433EF; Thu, 9 Feb 2023 11:17:04 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=kernel.org; s=k20201202; t=1675941426; bh=4KLMRmXFwHw9jfP/NyiuIHUrBIS0EUbyrDRrdI25NpA=; h=From:To:Cc:Subject:Date:In-Reply-To:References:From; b=qiX2/Br5Gi664TmsZ729wF1Dx7Lep8W1k922zPkCIqxkYRJD5dblpNC2uayDRlgiz dOUWG1Qp3+B6yPhDL8+VmtPPmkChW6bztz3eFmIEGEGl0r6QTCrcQTJzcBZa8gy/DX 9a3hFJ2bS5SqraO22TMkMtjpQ/Q0SHkyCKK0LQxkv92TISfWXOBuloL1E08ebM1LgH T/2cylpuaZLf7IaNaZ+s3t6m68Vql8GQX5+31/VWt/a4kxxY9pKKtRYh/zTK7TiJm5 DAD6PK9FJJ+YadzYi0b5pvTiyOsxbMEwA3hY4+yfRl+LlV+mVC2J3jvbWpByKeqt8Z NEYEzD4E1Q8Aw== From: Sasha Levin To: linux-kernel@vger.kernel.org, stable@vger.kernel.org Cc: George Shen , Alvin Lee , Alex Hung , Daniel Wheeler , Alex Deucher , Sasha Levin , harry.wentland@amd.com, sunpeng.li@amd.com, Rodrigo.Siqueira@amd.com, christian.koenig@amd.com, Xinhui.Pan@amd.com, airlied@gmail.com, daniel@ffwll.ch, Jun.Lei@amd.com, Martin.Leung@amd.com, wenjing.liu@amd.com, aurabindo.pillai@amd.com, Dillon.Varone@amd.com, amd-gfx@lists.freedesktop.org, dri-devel@lists.freedesktop.org Subject: [PATCH AUTOSEL 6.1 31/38] drm/amd/display: Unassign does_plane_fit_in_mall function from dcn3.2 Date: Thu, 9 Feb 2023 06:14:50 -0500 Message-Id: <20230209111459.1891941-31-sashal@kernel.org> X-Mailer: git-send-email 2.39.0 In-Reply-To: <20230209111459.1891941-1-sashal@kernel.org> References: <20230209111459.1891941-1-sashal@kernel.org> MIME-Version: 1.0 X-stable: review X-Patchwork-Hint: Ignore Content-Transfer-Encoding: 8bit Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org From: George Shen [ Upstream commit 275d8a1db261a1272a818d40ebc61b3b865b60e5 ] [Why] The hwss function does_plane_fit_in_mall not applicable to dcn3.2 asics. Using it with dcn3.2 can result in undefined behaviour. [How] Assign the function pointer to NULL. Reviewed-by: Alvin Lee Acked-by: Alex Hung Signed-off-by: George Shen Tested-by: Daniel Wheeler Signed-off-by: Alex Deucher Signed-off-by: Sasha Levin --- drivers/gpu/drm/amd/display/dc/dcn32/dcn32_init.c | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/drivers/gpu/drm/amd/display/dc/dcn32/dcn32_init.c b/drivers/gpu/drm/amd/display/dc/dcn32/dcn32_init.c index 45a949ba6f3f3..7b7f0e6b2a2ff 100644 --- a/drivers/gpu/drm/amd/display/dc/dcn32/dcn32_init.c +++ b/drivers/gpu/drm/amd/display/dc/dcn32/dcn32_init.c @@ -94,7 +94,7 @@ static const struct hw_sequencer_funcs dcn32_funcs = { .get_vupdate_offset_from_vsync = dcn10_get_vupdate_offset_from_vsync, .calc_vupdate_position = dcn10_calc_vupdate_position, .apply_idle_power_optimizations = dcn32_apply_idle_power_optimizations, - .does_plane_fit_in_mall = dcn30_does_plane_fit_in_mall, + .does_plane_fit_in_mall = NULL, .set_backlight_level = dcn21_set_backlight_level, .set_abm_immediate_disable = dcn21_set_abm_immediate_disable, .hardware_release = dcn30_hardware_release, -- 2.39.0