Message-ID: <ea447e7c-8e80-07cd-25c0-3fc2a651eb48@ti.com>
Date:   Fri, 10 Feb 2023 11:56:18 +0530
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Subject: Re: [EXTERNAL] Re: [EXTERNAL] Re: [EXTERNAL] Re: [EXTERNAL] Re:
 [PATCH v4 2/2] net: ti: icssg-prueth: Add ICSSG ethernet driver
To:     Andrew Lunn <andrew@lunn.ch>
CC:     Roger Quadros <rogerq@kernel.org>,
        MD Danish Anwar <danishanwar@ti.com>,
        "Andrew F. Davis" <afd@ti.com>, Suman Anna <s-anna@ti.com>,
        YueHaibing <yuehaibing@huawei.com>,
        Vignesh Raghavendra <vigneshr@ti.com>,
        Krzysztof Kozlowski <krzysztof.kozlowski+dt@linaro.org>,
        Rob Herring <robh+dt@kernel.org>,
        Paolo Abeni <pabeni@redhat.com>,
        Jakub Kicinski <kuba@kernel.org>,
        Eric Dumazet <edumazet@google.com>,
        "David S. Miller" <davem@davemloft.net>, <nm@ti.com>,
        <ssantosh@kernel.org>, <srk@ti.com>,
        <linux-kernel@vger.kernel.org>, <devicetree@vger.kernel.org>,
        <netdev@vger.kernel.org>, <linux-omap@vger.kernel.org>,
        <linux-arm-kernel@lists.infradead.org>
References: <20230206060708.3574472-1-danishanwar@ti.com>
 <20230206060708.3574472-3-danishanwar@ti.com> <Y+ELeSQX+GWS5N2p@lunn.ch>
 <42503a0d-b434-bbcc-553d-a326af5b4918@ti.com>
 <e8158969-08d0-1edc-24be-8c300a71adbd@kernel.org>
 <4438fb71-7e20-6532-a858-b688bc64e826@ti.com> <Y+Ob8++GWciL127K@lunn.ch>
 <6713252d-6f86-c674-9229-c4512ebf1d72@ti.com> <Y+T7MAu0/s1bjYIt@lunn.ch>
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From:   Md Danish Anwar <a0501179@ti.com>
Organization: Texas Instruments
In-Reply-To: <Y+T7MAu0/s1bjYIt@lunn.ch>
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On 09/02/23 19:24, Andrew Lunn wrote:
>> Sure, I'll do that. In the list of all phy modes described in [1], I can only
>> see phy-mode "rgmii-txid", for which we can return -EINVAL. Is there any other
>> phy-mode that requires enabling/disabling TX internal delays? Please let me
>> know if any other phy-mode also needs this. I will add check for that as well.
> 
> There are 4 phy-modes for RGMII.
> 
> rgmii, rgmii-id, rmgii-rxid, rgmii-txid.
> 
> rgmii-id, rgmii-txid both require TX delays. If you do that in the MAC
> you then need to pass rgmii-rxid and rgmii to the PHY respectively.
> 
> rmii and rgmii-rxid requires no TX delays, which your SoC cannot do,
> so you need to return -EINVAl,
> 
> The interpretation of these properties is all really messy and
> historically not very uniformly done. Which is why i recommend the MAC
> does nothing, leaving it to the PHY. That generally works since the
> PHYs have a pretty uniform implementation. But in your case, you don't
> have that option. So i suggest you do what is described above. 
> 
>     Andrew

Sure Andrew, I will post new revision with the changes described above.

-- 
Thanks and Regards,
Danish.