Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id CD662C636D7 for ; Sat, 11 Feb 2023 00:37:22 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S229664AbjBKAhU (ORCPT ); Fri, 10 Feb 2023 19:37:20 -0500 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:57744 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S229461AbjBKAhS (ORCPT ); Fri, 10 Feb 2023 19:37:18 -0500 Received: from ams.source.kernel.org (ams.source.kernel.org [145.40.68.75]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id D3C6454554; Fri, 10 Feb 2023 16:36:35 -0800 (PST) Received: from smtp.kernel.org (relay.kernel.org [52.25.139.140]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by ams.source.kernel.org (Postfix) with ESMTPS id 80765B82683; Sat, 11 Feb 2023 00:36:06 +0000 (UTC) Received: by smtp.kernel.org (Postfix) with ESMTPSA id 25130C433D2; Sat, 11 Feb 2023 00:36:04 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=kernel.org; s=k20201202; t=1676075765; bh=ZR6UHnSLhkZTwincKhA1MwfDs6shVQ3sA7iUWeLSg7c=; h=Date:From:To:Cc:Subject:In-Reply-To:References:From; b=LoJDmA9NpPYPeViPKE+6CkePtp8MU75aTgNbGzcFGBfOdovTDs0UZbLRxP4Eq82/t Uq6XDivwcjSA8XaSNGy783XUN3ROnDTCd/V3ScwoSfuCpuOhCbjzaVkPY6CiFLSLrl a8xwaj7iMon36wx34p0DejTunup8I2OarIw5Ys+UoPgDfsqyTkzfreyluOYLBnDZea jebiYP/2QwEPKacDYijJcJMB0Kk9V6Vg8DUFo76TAeaPjwzW+e1MMTu36vubXKwCsj AwT95tvfFjCESrJ9jzV/VnOwfxtXrSU8eRSymsttZQvJUUPP6/p4nhoHLVdokOf01y MBmg3ZXflefcQ== Date: Fri, 10 Feb 2023 16:36:02 -0800 From: Jakub Kicinski To: Hariprasad Kelam Cc: , , , , , , , , , , , , , , , , , , , , Subject: Re: [net-next Patch V4 0/4] octeontx2-pf: HTB offload support Message-ID: <20230210163602.08d1ce5f@kernel.org> In-Reply-To: <20230210111051.13654-1-hkelam@marvell.com> References: <20230210111051.13654-1-hkelam@marvell.com> MIME-Version: 1.0 Content-Type: text/plain; charset=US-ASCII Content-Transfer-Encoding: 7bit Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org On Fri, 10 Feb 2023 16:40:47 +0530 Hariprasad Kelam wrote: > octeontx2 silicon and CN10K transmit interface consists of five > transmit levels starting from MDQ, TL4 to TL1. Once packets are > submitted to MDQ, hardware picks all active MDQs using strict > priority, and MDQs having the same priority level are chosen using > round robin. Each packet will traverse MDQ, TL4 to TL1 levels. > Each level contains an array of queues to support scheduling and > shaping. > > As HTB supports classful queuing mechanism by supporting rate and > ceil and allow the user to control the absolute bandwidth to > particular classes of traffic the same can be achieved by > configuring shapers and schedulers on different transmit levels. Please provide or link to some user-facing documentation under Documentation/networking/device_drivers/ethernet/marvell/octeon...