Message-ID: <b5fa8148-1dc6-b8a7-2f5d-95f0354197e6@collabora.com>
Date:   Sat, 11 Feb 2023 13:53:46 +0200
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Subject: Re: [PATCH 00/12] Enable networking support for StarFive JH7100 SoC
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To:     Conor Dooley <conor@kernel.org>
Cc:     Lee Jones <lee@kernel.org>, Rob Herring <robh+dt@kernel.org>,
        Krzysztof Kozlowski <krzysztof.kozlowski+dt@linaro.org>,
        "David S. Miller" <davem@davemloft.net>,
        Eric Dumazet <edumazet@google.com>,
        Jakub Kicinski <kuba@kernel.org>,
        Paolo Abeni <pabeni@redhat.com>,
        Emil Renner Berthing <kernel@esmil.dk>,
        Palmer Dabbelt <palmer@dabbelt.com>,
        Paul Walmsley <paul.walmsley@sifive.com>,
        Albert Ou <aou@eecs.berkeley.edu>,
        Giuseppe Cavallaro <peppe.cavallaro@st.com>,
        Alexandre Torgue <alexandre.torgue@foss.st.com>,
        Jose Abreu <joabreu@synopsys.com>,
        Maxime Coquelin <mcoquelin.stm32@gmail.com>,
        Richard Cochran <richardcochran@gmail.com>,
        Sagar Kadam <sagar.kadam@sifive.com>,
        Yanhong Wang <yanhong.wang@starfivetech.com>,
        devicetree@vger.kernel.org, linux-kernel@vger.kernel.org,
        netdev@vger.kernel.org, linux-riscv@lists.infradead.org,
        linux-stm32@st-md-mailman.stormreply.com,
        linux-arm-kernel@lists.infradead.org, kernel@collabora.com,
        arnd@arndb.de, prabhakar.csengg@gmail.com
References: <20230211031821.976408-1-cristian.ciocaltea@collabora.com>
 <Y+d36nz0xdfXmDI1@spud>
From:   Cristian Ciocaltea <cristian.ciocaltea@collabora.com>
In-Reply-To: <Y+d36nz0xdfXmDI1@spud>
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Hi Conor,

On 2/11/23 13:11, Conor Dooley wrote:
> Hey Cristian!
> 
> +CC Arnd, Prabhakar
> 
> On Sat, Feb 11, 2023 at 05:18:09AM +0200, Cristian Ciocaltea wrote:
>> This patch series adds ethernet support for the StarFive JH7100 SoC and
>> makes it available for the StarFive VisionFive V1 and BeagleV Starlight
>> boards, although I could only validate on the former SBC.
>>
>> The work is heavily based on the reference implementation [1] and requires
>> the non-coherent DMA support provided by Emil via the Sifive Composable
>> Cache controller.
>>
>> Also note there is an overlap in "[PATCH 08/12] net: stmmac: Add glue layer
>> for StarFive JH7100 SoC" with the Yanhong Wang's upstreaming attempt [2]:
>> "[PATCH v4 5/7] net: stmmac: Add glue layer for StarFive JH7110 SoCs".
>>
>> Since I cannot test the JH7110 SoC, I dropped the support for it from Emil's
>> variant of the stmmac glue layer. Hence, we might need a bit of coordination
>> in order to get this properly merged.
> 
> To be honest, that one is the least of your worries sequencing wise.
> Anything doing non-coherent DMA on RISC-V that doesn't use instructions is
> dependant on Prabhakar's series:
> https://lore.kernel.org/linux-riscv/20230106185526.260163-1-prabhakar.mahadev-lad.rj@bp.renesas.com/#t
> That's kinda stalled out though, waiting on Arnd to make some changes to
> the cross-arch DMA code:
> https://lore.kernel.org/linux-riscv/ea4cb121-97e9-4365-861a-b3635fd34721@app.fastmail.com/

Thank you for pointing this out, I wasn't aware of it!

> I was talking to Emil about the non-coherent support at FOSDEM actually,
> and I see no real reason not to bring the JH7100 non-coherent support in
> if we are doing it for other SoCs.
> 
> So yeah, hopefully we shall get there at some point soonTM...

That would be great, I'll try to monitor the progress and re-spin the 
series as soon as the non-coherent support is figured out.

Regards,
Cristian

> Sorry,
> Conor.

>> [1] https://github.com/starfive-tech/linux/commits/visionfive
>> [2] https://lore.kernel.org/linux-riscv/20230118061701.30047-6-yanhong.wang@starfivetech.com/
>>
>> Cristian Ciocaltea (7):
>>    dt-bindings: riscv: sifive-ccache: Add compatible for StarFive JH7100
>>      SoC
>>    dt-bindings: riscv: sifive-ccache: Add 'uncached-offset' property
>>    dt-bindings: net: Add StarFive JH7100 SoC
>>    riscv: dts: starfive: Add dma-noncoherent for JH7100 SoC
>>    riscv: dts: starfive: jh7100: Add ccache DT node
>>    riscv: dts: starfive: jh7100: Add sysmain and gmac DT nodes
>>    riscv: dts: starfive: jh7100-common: Setup pinmux and enable gmac
>>
>> Emil Renner Berthing (5):
>>    soc: sifive: ccache: Add StarFive JH7100 support
>>    soc: sifive: ccache: Add non-coherent DMA handling
>>    riscv: Implement non-coherent DMA support via SiFive cache flushing
>>    dt-bindings: mfd: syscon: Add StarFive JH7100 sysmain compatible
>>    net: stmmac: Add glue layer for StarFive JH7100 SoC
>>
>>   .../devicetree/bindings/mfd/syscon.yaml       |   1 +
>>   .../devicetree/bindings/net/snps,dwmac.yaml   |  15 +-
>>   .../bindings/net/starfive,jh7100-dwmac.yaml   | 106 ++++++++++++
>>   .../bindings/riscv/sifive,ccache0.yaml        |  33 +++-
>>   MAINTAINERS                                   |   6 +
>>   arch/riscv/Kconfig                            |   6 +-
>>   .../boot/dts/starfive/jh7100-common.dtsi      |  78 +++++++++
>>   arch/riscv/boot/dts/starfive/jh7100.dtsi      |  55 +++++++
>>   arch/riscv/mm/dma-noncoherent.c               |  37 ++++-
>>   drivers/net/ethernet/stmicro/stmmac/Kconfig   |  12 ++
>>   drivers/net/ethernet/stmicro/stmmac/Makefile  |   1 +
>>   .../ethernet/stmicro/stmmac/dwmac-starfive.c  | 155 ++++++++++++++++++
>>   drivers/soc/sifive/Kconfig                    |   1 +
>>   drivers/soc/sifive/sifive_ccache.c            |  71 +++++++-
>>   include/soc/sifive/sifive_ccache.h            |  21 +++
>>   15 files changed, 587 insertions(+), 11 deletions(-)
>>   create mode 100644 Documentation/devicetree/bindings/net/starfive,jh7100-dwmac.yaml
>>   create mode 100644 drivers/net/ethernet/stmicro/stmmac/dwmac-starfive.c
>>
>> -- 
>> 2.39.1
>>