Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id A18E3C6379F for ; Tue, 14 Feb 2023 05:44:40 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S230457AbjBNFoj (ORCPT ); Tue, 14 Feb 2023 00:44:39 -0500 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:60406 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S229713AbjBNFoh (ORCPT ); Tue, 14 Feb 2023 00:44:37 -0500 Received: from mx0a-0031df01.pphosted.com (mx0a-0031df01.pphosted.com [205.220.168.131]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id 11F2C15C97; Mon, 13 Feb 2023 21:44:36 -0800 (PST) Received: from pps.filterd (m0279864.ppops.net [127.0.0.1]) by mx0a-0031df01.pphosted.com (8.17.1.19/8.17.1.19) with ESMTP id 31E2Z5Zq004919; Tue, 14 Feb 2023 05:15:31 GMT DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=quicinc.com; h=from : to : cc : subject : date : message-id : in-reply-to : references : mime-version : content-type; s=qcppdkim1; bh=GwBnDd3MiW5jke2E07p3AhWuIm6Hx2aJosUP0mdx5VE=; b=XdwhwBVywDIyG5c73rWhdq5Uau+mgA3Nn+sZpuJV/o6pmGznRdR05beWGTUjpxb0Ni/O 67/aCfJWox6pyyjxTvNdIVvAmjdsY1YXp/p+BKNgF7PcKdZO2oN+v696y8WnutoLDpyP 7JQ55LRmWbuN8QCCv5Cy2KSC07omkDJWuWXkEmiIU0SIsXs1e5aSf38TSfmXxHAoVlH8 Z4rWg6ClUTeWnPhQYJSgMLV99DJRAOMt0PbiSwAgRik7Nyz5S8JxdIU2XngkuWJ/AZ8x LXhTD2B//vYfwu+5ZXmxp/jMj8Vl0GiHRVpFyjLI7NQwTiZdI3YhXzK6U75LbRAiVYxZ qQ== Received: from nalasppmta04.qualcomm.com (Global_NAT1.qualcomm.com [129.46.96.20]) by mx0a-0031df01.pphosted.com (PPS) with ESMTPS id 3nqpmmhrg3-1 (version=TLSv1.2 cipher=ECDHE-RSA-AES256-GCM-SHA384 bits=256 verify=NOT); Tue, 14 Feb 2023 05:15:31 +0000 Received: from nalasex01a.na.qualcomm.com (nalasex01a.na.qualcomm.com [10.47.209.196]) by NALASPPMTA04.qualcomm.com (8.17.1.5/8.17.1.5) with ESMTPS id 31E5FUsf008635 (version=TLSv1.2 cipher=ECDHE-RSA-AES256-GCM-SHA384 bits=256 verify=NOT); Tue, 14 Feb 2023 05:15:30 GMT Received: from poovendh-linux.qualcomm.com (10.80.80.8) by nalasex01a.na.qualcomm.com (10.47.209.196) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_256_GCM_SHA384) id 15.2.986.36; Mon, 13 Feb 2023 21:15:20 -0800 From: Poovendhan Selvaraj To: , , , , , , , , , , , , , , , , , , , , , , , CC: , , , , , , Subject: [PATCH V4 5/5] firmware: scm: Modify only the DLOAD bit in TCSR register for download mode Date: Tue, 14 Feb 2023 10:44:14 +0530 Message-ID: <20230214051414.10740-6-quic_poovendh@quicinc.com> X-Mailer: git-send-email 2.17.1 In-Reply-To: <20230214051414.10740-1-quic_poovendh@quicinc.com> References: <20230214051414.10740-1-quic_poovendh@quicinc.com> MIME-Version: 1.0 Content-Type: text/plain X-Originating-IP: [10.80.80.8] X-ClientProxiedBy: nasanex01a.na.qualcomm.com (10.52.223.231) To nalasex01a.na.qualcomm.com (10.47.209.196) X-QCInternal: smtphost X-Proofpoint-Virus-Version: vendor=nai engine=6200 definitions=5800 signatures=585085 X-Proofpoint-ORIG-GUID: R3YTBaFJRisbIIVfQt-1DDfoo1rEwS8I X-Proofpoint-GUID: R3YTBaFJRisbIIVfQt-1DDfoo1rEwS8I X-Proofpoint-Virus-Version: vendor=baseguard engine=ICAP:2.0.219,Aquarius:18.0.930,Hydra:6.0.562,FMLib:17.11.170.22 definitions=2023-02-14_03,2023-02-13_01,2023-02-09_01 X-Proofpoint-Spam-Details: rule=outbound_notspam policy=outbound score=0 lowpriorityscore=0 spamscore=0 priorityscore=1501 suspectscore=0 adultscore=0 impostorscore=0 bulkscore=0 clxscore=1015 mlxscore=0 mlxlogscore=999 phishscore=0 malwarescore=0 classifier=spam adjust=0 reason=mlx scancount=1 engine=8.12.0-2212070000 definitions=main-2302140043 Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org CrashDump collection is based on the DLOAD bit of TCSR register. To retain other bits, we read the register and modify only the DLOAD bit as the other bits have their own significance. Co-developed-by: Anusha Rao Signed-off-by: Anusha Rao Co-developed-by: Kathiravan Thirumoorthy Signed-off-by: Kathiravan Thirumoorthy Signed-off-by: Poovendhan Selvaraj --- Changes in V4: - retain the orginal value of tcsr register when download mode is not set drivers/firmware/qcom_scm.c | 15 ++++++++++----- 1 file changed, 10 insertions(+), 5 deletions(-) diff --git a/drivers/firmware/qcom_scm.c b/drivers/firmware/qcom_scm.c index 468d4d5ab550..8a34b386ac3a 100644 --- a/drivers/firmware/qcom_scm.c +++ b/drivers/firmware/qcom_scm.c @@ -407,7 +407,7 @@ int qcom_scm_set_remote_state(u32 state, u32 id) } EXPORT_SYMBOL(qcom_scm_set_remote_state); -static int __qcom_scm_set_dload_mode(struct device *dev, bool enable) +static int __qcom_scm_set_dload_mode(struct device *dev, u32 val, bool enable) { struct qcom_scm_desc desc = { .svc = QCOM_SCM_SVC_BOOT, @@ -417,7 +417,8 @@ static int __qcom_scm_set_dload_mode(struct device *dev, bool enable) .owner = ARM_SMCCC_OWNER_SIP, }; - desc.args[1] = enable ? QCOM_SCM_BOOT_SET_DLOAD_MODE : 0; + desc.args[1] = enable ? val | QCOM_SCM_BOOT_SET_DLOAD_MODE : + val & ~(QCOM_SCM_BOOT_SET_DLOAD_MODE); return qcom_scm_call_atomic(__scm->dev, &desc, NULL); } @@ -426,15 +427,19 @@ static void qcom_scm_set_download_mode(bool enable) { bool avail; int ret = 0; + u32 dload_addr_val; avail = __qcom_scm_is_call_available(__scm->dev, QCOM_SCM_SVC_BOOT, QCOM_SCM_BOOT_SET_DLOAD_MODE); + ret = qcom_scm_io_readl(__scm->dload_mode_addr, &dload_addr_val); + if (avail) { - ret = __qcom_scm_set_dload_mode(__scm->dev, enable); + ret = __qcom_scm_set_dload_mode(__scm->dev, dload_addr_val, enable); } else if (__scm->dload_mode_addr) { - ret = qcom_scm_io_writel(__scm->dload_mode_addr, - enable ? QCOM_SCM_BOOT_SET_DLOAD_MODE : 0); + ret = qcom_scm_io_writel(__scm->dload_mode_addr, enable ? + dload_addr_val | QCOM_SCM_BOOT_SET_DLOAD_MODE : + dload_addr_val & ~(QCOM_SCM_BOOT_SET_DLOAD_MODE)); } else { dev_err(__scm->dev, "No available mechanism for setting download mode\n"); -- 2.17.1