Date: Thu, 6 Sep 2007 11:14:37 +0100
From: Arjan van de Ven <arjan@infradead.org>
To: "Andreas Herrmann" <andreas.herrmann3@amd.com>
Cc: "H. Peter Anvin" <hpa@zytor.com>,
       "Robert Richter" <robert.richter@amd.com>, patches@x86-64.org,
       linux-kernel@vger.kernel.org
Subject: Re: [patches] [patch 3/5] x86: Add PCI extended config space access
 for AMD Barcelona
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On Wed, 5 Sep 2007 17:00:27 +0200
"Andreas Herrmann" <andreas.herrmann3@amd.com> wrote:

> On Wed, Sep 05, 2007 at 06:58:58AM +0100, H. Peter Anvin wrote:
> > Well, they don't add any functionality, do they?
> 
> They allow CF8/CFC to access ECS in cases where mmcfg is not working.
> 

just for the record; I have absolutely no problem with allowing the new
cf8 method (I'm assuming that it's obvious that if mmio is available,
that will be used instead for performance reasons). What I was/am
concerned/uncomfortable about is keying this off the CPU level rather
than a PCI level property; I much rather would see this keyed of, say,
the PCI ID of the root bridge, or ideally from some PCI property.
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