Message-ID: <7336923b-e322-1211-0c1d-7ad70c7bfef7@linaro.org>
Date:   Tue, 14 Feb 2023 10:47:42 +0100
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Subject: Re: [PATCH 1/3] arm64: dts: qcom: qdu1000: Add IPCC, MPSS, AOSS nodes
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To:     Melody Olvera <quic_molvera@quicinc.com>,
        Andy Gross <agross@kernel.org>,
        Bjorn Andersson <andersson@kernel.org>,
        Rob Herring <robh+dt@kernel.org>,
        Krzysztof Kozlowski <krzysztof.kozlowski+dt@linaro.org>
Cc:     Konrad Dybcio <konrad.dybcio@linaro.org>,
        linux-arm-msm@vger.kernel.org, devicetree@vger.kernel.org,
        linux-kernel@vger.kernel.org
References: <20230213190122.178501-1-quic_molvera@quicinc.com>
 <20230213190122.178501-2-quic_molvera@quicinc.com>
From:   Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
In-Reply-To: <20230213190122.178501-2-quic_molvera@quicinc.com>
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On 13/02/2023 20:01, Melody Olvera wrote:
> Add nodes for IPCC, MPSS, and AOSS drivers. Also update
> the scm node to include its interconnect.
> 
> Signed-off-by: Melody Olvera <quic_molvera@quicinc.com>
> ---


>  
> +		aoss_qmp: power-controller@c300000 {
> +			compatible = "qcom,qdu1000-aoss-qmp", "qcom,aoss-qmp";
> +			reg = <0x0 0xc300000 0x0 0x400>;
> +			interrupts-extended = <&ipcc IPCC_CLIENT_AOP
> +						     IPCC_MPROC_SIGNAL_GLINK_QMP
> +						     IRQ_TYPE_EDGE_RISING>;
> +			mboxes = <&ipcc IPCC_CLIENT_AOP IPCC_MPROC_SIGNAL_GLINK_QMP>;
> +
> +			#clock-cells = <0>;
> +			#power-domain-cells = <1>;

This does not look right. Which part of aoss-qmp registers power domains?

Best regards,
Krzysztof