Message-ID: <ccc4b7fe-db07-cddb-2d0b-b6a89d7b1155@nvidia.com>
Date:   Tue, 14 Feb 2023 19:27:54 +0530
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Subject: Re: [PATCH V5 0/3] PCI: designware-ep: Fix DBI access before core
 init
To:     Manivannan Sadhasivam <mani@kernel.org>
Cc:     jingoohan1@gmail.com, gustavo.pimentel@synopsys.com,
        lpieralisi@kernel.org, robh@kernel.org, kw@linux.com,
        bhelgaas@google.com, Sergey.Semin@baikalelectronics.ru,
        dmitry.baryshkov@linaro.org, linmq006@gmail.com,
        ffclaire1224@gmail.com, thierry.reding@gmail.com,
        jonathanh@nvidia.com, linux-pci@vger.kernel.org,
        linux-arm-msm@vger.kernel.org, linux-kernel@vger.kernel.org,
        kthota@nvidia.com, mmaddireddy@nvidia.com, sagar.tv@gmail.com
References: <20221013175712.7539-1-vidyas@nvidia.com>
 <20230214130329.GC4981@thinkpad>
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From:   Vidya Sagar <vidyas@nvidia.com>
In-Reply-To: <20230214130329.GC4981@thinkpad>
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On 2/14/2023 6:33 PM, Manivannan Sadhasivam wrote:
> External email: Use caution opening links or attachments
> 
> 
> On Thu, Oct 13, 2022 at 11:27:09PM +0530, Vidya Sagar wrote:
>> This series attempts to fix the issue with core register (Ex:- DBI) accesses
>> causing system hang issues in platforms where there is a dependency on the
>> availability of PCIe Reference clock from the host for their core
>> initialization.
>> This series is verified on Tegra194 & Tegra234 platforms.
>>
>> Manivannan, could you please verify on qcom platforms?
>>
> 
> Vidya, any plan to respin this series? The EPC rework series is now merged for
> v6.3.

Yes. I'll send an updated series soon.
Currently, I'm observing some regression with linux-next on Tegra 
platform for endpoint mode. I'll post the patches as soon as that is 
resolved.

Thanks,
Vidya Sagar

> 
> Thanks,
> Mani
> 
>> V5:
>> * Addressed review comments from Bjorn
>> * Changed dw_pcie_ep_init_complete() to dw_pcie_ep_init_late()
>> * Skipped memory allocation if done already. This is to avoid freeing and then
>>    allocating again during PERST# toggles from the host.
>>
>> V4:
>> * Addressed review comments from Bjorn and Manivannan
>> * Added .ep_init_late() ops
>> * Added patches to refactor code in qcom and tegra platforms
>>
>> Vidya Sagar (3):
>>    PCI: designware-ep: Fix DBI access before core init
>>    PCI: qcom-ep: Refactor EP initialization completion
>>    PCI: tegra194: Refactor EP initialization completion
>>
>>   .../pci/controller/dwc/pcie-designware-ep.c   | 125 +++++++++++-------
>>   drivers/pci/controller/dwc/pcie-designware.h  |  10 +-
>>   drivers/pci/controller/dwc/pcie-qcom-ep.c     |  27 ++--
>>   drivers/pci/controller/dwc/pcie-tegra194.c    |   4 +-
>>   4 files changed, 97 insertions(+), 69 deletions(-)
>>
>> --
>> 2.17.1
>>
> 
> --
> மணிவண்ணன் சதாசிவம்