Date:   Tue, 14 Feb 2023 18:49:04 +0100
From:   Maciej Fijalkowski <maciej.fijalkowski@intel.com>
To:     Veerasenareddy Burru <vburru@marvell.com>
CC:     <netdev@vger.kernel.org>, <linux-kernel@vger.kernel.org>,
        <aayarekar@marvell.com>, <sedara@marvell.com>,
        <sburla@marvell.com>, <linux-doc@vger.kernel.org>,
        "David S. Miller" <davem@davemloft.net>,
        "Eric Dumazet" <edumazet@google.com>,
        Jakub Kicinski <kuba@kernel.org>,
        Paolo Abeni <pabeni@redhat.com>
Subject: Re: [PATCH net-next v3 3/7] octeon_ep: control mailbox for multiple
 PFs
Message-ID: <Y+vJkPO1UZPDSFT2@boxer>
References: <20230214051422.13705-1-vburru@marvell.com>
 <20230214051422.13705-4-vburru@marvell.com>
Content-Type: text/plain; charset="us-ascii"
Content-Disposition: inline
In-Reply-To: <20230214051422.13705-4-vburru@marvell.com>
MIME-Version: 1.0
X-MS-Exchange-AntiSpam-MessageData-ChunkCount: 1
X-MS-Exchange-AntiSpam-MessageData-0: =?us-ascii?Q?5/s07lHGRaKYv32V/rKj/UI7YDyRT8gHeytwEyMQ62CGB+/1WvjDM1jw0Zo6?=
 =?us-ascii?Q?HksZAoUGxEIkjCl2OHNvKuLwkPSxPSPfhUuWiflZZKYlaOvlk7XxBGtgncMf?=
 =?us-ascii?Q?G1SKhC2zdaA7ILKG18+KcblgZKT0OdyQ/N4AibO/fkPVJA+xTw0PQ+csPb/l?=
 =?us-ascii?Q?bxlvxUxlezutRPY2nmvrI74s779FHRKWK2pAjxIZnKlbLpPgiXf08wo40pj4?=
 =?us-ascii?Q?K1DlDZCeARRoBl+eukvdW0gcc2EX/fRFjxZ1Bqx/o2j95A/TmAzbLdPFHPuL?=
 =?us-ascii?Q?4/90A7kc3y99xwL9IqsZJIFqYnGrqokegsQzV0ARtom6R/ncvAhKfAULGRNi?=
 =?us-ascii?Q?oVbW8nnHiFoQSV3dUbhxBBVkfEoFJZiNMI1rOUgq+dqwy3rjUWY6ZnezDD7O?=
 =?us-ascii?Q?HJeLWR/E+RWBUR4LvWexFfxPxH/mIS4LgUrAe+TT81sjItfUHc1eaKp2icH9?=
 =?us-ascii?Q?N/r4kVPbBltwj0DyVRDWnTz3oxBtYo8v+iEXqFrSjEQxkmlaGZBjZbH9LjvQ?=
 =?us-ascii?Q?nPtYEdcOCqUa1kVdyq1a2qQC63iLYIPL1jyNYH7JHuHBnIQ9xLnkE6NmNzea?=
 =?us-ascii?Q?mRrNNT45qdwKZCcfOvby3BxLUzJj9JYnLOB37SEeScy7htgOWkVJ8e+VnYAy?=
 =?us-ascii?Q?eYcpSK0pXsipNqZlI++0K/SEkqeSDWS1j0nIBX4jQ1hM37P32KNTWtdM10Hj?=
 =?us-ascii?Q?9tOifuKGfkM3pBJ5gaOuskgYxII2fHfYeU/SAtNq39Ag5ZGYe02IgB5fUhew?=
 =?us-ascii?Q?CqWqUvk3onwb5xZ0tIsvy4IqGeLd7r0KzAxwmYvYoIEZM8bZwvxwBNn2u8E+?=
 =?us-ascii?Q?A3HmvnlZFgHHfPZwkGtSmYDkXzpgN0xm5DnbtiJVDMngqydckFSAMpd6aIcA?=
 =?us-ascii?Q?yxi1/O5f4CnNkf6L7A1MFPdQjKYV5+Ch9D/dIG6HdX3jaQXTE508b8F+wf5R?=
 =?us-ascii?Q?vYDNqV6jbuoLyBqA2DKzE//QDV1fPCjdt2X3kPlHqjP3HfjBayx8wR76YRAg?=
 =?us-ascii?Q?T+fl2ifA6aZu+t3zHvuh8nYyS7KZi54IfToCIXT9v+DInuVb8GS+nMtBKrQ5?=
 =?us-ascii?Q?nM2FaNXhed7K6qZPiYbOfg9cfcREuG92nJgMBdAAJwshcK47kUMZ2/NnWJlm?=
 =?us-ascii?Q?WKkzwm3EMuKXrHSkuIDgVevirJGtVKncL9as+tImnJMxzJK4Cbi1AZScy4X9?=
 =?us-ascii?Q?hy+a73LVpeypkrzGUzgxYWXg0+r5VfozqtYwo+60zjlBvLwOF4hAAw3P5iUc?=
 =?us-ascii?Q?Ir34aWJRZRuQWWhxruJm3bnyOjELQEa+fmWiWPkJPOzeWJloP1aDGxeFcmSJ?=
 =?us-ascii?Q?uNrRF053J/YD3s2w7Xn+IlZitY5fWeaTyMU6qO4rIjw/8HQKUUZhATCPNZwk?=
 =?us-ascii?Q?4SAhxBJUJ4wfJWB47CjkuTuVnvzhTNaddiRu4UmUvfNWJNce9yOhu/ZdfIJs?=
 =?us-ascii?Q?EBfZPB6/frwY+27P2KfO12J6qxWzbkOMtM5AB3zZfCFvu9kQHA8mbgK+pMiF?=
 =?us-ascii?Q?0tXlFlSbTNJ4kvsvCQkUOM3NHGcRgBpoxSYVopZlZVgr77xPXOYtxmQ1Qybu?=
 =?us-ascii?Q?UnWs4au/2uPus78T+xladSApzRYWOorOeaOFoH2T49tAFw+ZB/ZG/Hs/dxQ5?=
 =?us-ascii?Q?4kx4uZQnjJUJDXwfFgpArGQ=3D?=
X-MS-Exchange-CrossTenant-Network-Message-Id: b23bbad7-6ea1-4589-59ee-08db0eb3c7fd
X-MS-Exchange-CrossTenant-AuthSource: DM4PR11MB6117.namprd11.prod.outlook.com
X-MS-Exchange-CrossTenant-AuthAs: Internal
X-MS-Exchange-CrossTenant-OriginalArrivalTime: 14 Feb 2023 17:49:12.2136
 (UTC)
X-MS-Exchange-CrossTenant-FromEntityHeader: Hosted
X-MS-Exchange-CrossTenant-Id: 46c98d88-e344-4ed4-8496-4ed7712e255d
X-MS-Exchange-CrossTenant-MailboxType: HOSTED
X-MS-Exchange-CrossTenant-UserPrincipalName: Ib3rHKHdpIv+ELvAdAfAPxIHvEa5qIVn3B3uhMvWLT6w8kLdh4rNCILXAGI6+y0HnzFbGZVxwwHyMZ76xxAxViWWKd1yPXjGDKAwEGRhP5E=
X-MS-Exchange-Transport-CrossTenantHeadersStamped: MW3PR11MB4748
X-OriginatorOrg: intel.com
Precedence: bulk
List-ID: <linux-kernel.vger.kernel.org>
X-Mailing-List: linux-kernel@vger.kernel.org

On Mon, Feb 13, 2023 at 09:14:18PM -0800, Veerasenareddy Burru wrote:
> Add control mailbox support for multiple PFs.
> Update control mbox base address calculation based on PF function link.
> 
> Signed-off-by: Veerasenareddy Burru <vburru@marvell.com>
> Signed-off-by: Abhijit Ayarekar <aayarekar@marvell.com>
> ---
> v2 -> v3:
>  * no change
> 
> v1 -> v2:
>  * no change
> 
>  .../ethernet/marvell/octeon_ep/octep_cn9k_pf.c   | 16 +++++++++++++++-
>  1 file changed, 15 insertions(+), 1 deletion(-)
> 
> diff --git a/drivers/net/ethernet/marvell/octeon_ep/octep_cn9k_pf.c b/drivers/net/ethernet/marvell/octeon_ep/octep_cn9k_pf.c
> index f40ebac15a79..c82a1347eed8 100644
> --- a/drivers/net/ethernet/marvell/octeon_ep/octep_cn9k_pf.c
> +++ b/drivers/net/ethernet/marvell/octeon_ep/octep_cn9k_pf.c
> @@ -13,6 +13,9 @@
>  #include "octep_main.h"
>  #include "octep_regs_cn9k_pf.h"
>  
> +#define CTRL_MBOX_MAX_PF	128
> +#define CTRL_MBOX_SZ		((size_t)(0x400000 / CTRL_MBOX_MAX_PF))
> +
>  /* Names of Hardware non-queue generic interrupts */
>  static char *cn93_non_ioq_msix_names[] = {
>  	"epf_ire_rint",
> @@ -199,6 +202,8 @@ static void octep_init_config_cn93_pf(struct octep_device *oct)
>  	struct octep_config *conf = oct->conf;
>  	struct pci_dev *pdev = oct->pdev;
>  	u64 val;
> +	int pos;
> +	u8 link = 0;

RCT again

>  
>  	/* Read ring configuration:
>  	 * PF ring count, number of VFs and rings per VF supported
> @@ -234,7 +239,16 @@ static void octep_init_config_cn93_pf(struct octep_device *oct)
>  	conf->msix_cfg.ioq_msix = conf->pf_ring_cfg.active_io_rings;
>  	conf->msix_cfg.non_ioq_msix_names = cn93_non_ioq_msix_names;
>  
> -	conf->ctrl_mbox_cfg.barmem_addr = (void __iomem *)oct->mmio[2].hw_addr + (0x400000ull * 7);
> +	pos = pci_find_ext_capability(oct->pdev, PCI_EXT_CAP_ID_SRIOV);
> +	if (pos) {
> +		pci_read_config_byte(oct->pdev,
> +				     pos + PCI_SRIOV_FUNC_LINK,
> +				     &link);
> +		link = PCI_DEVFN(PCI_SLOT(oct->pdev->devfn), link);
> +	}
> +	conf->ctrl_mbox_cfg.barmem_addr = (void __iomem *)oct->mmio[2].hw_addr +
> +					   (0x400000ull * 8) +

can you explain why s/7/8 and was it broken previously?

> +					   (link * CTRL_MBOX_SZ);
>  }
>  
>  /* Setup registers for a hardware Tx Queue  */
> -- 
> 2.36.0
>