From: Jesse Barnes <jesse.barnes@intel.com>
To: "Yinghai Lu" <yhlu.kernel@gmail.com>
Subject: Re: [patches] [patch 3/5] x86: Add PCI extended config space access for AMD Barcelona
Date: Thu, 6 Sep 2007 10:48:25 -0700
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Cc: "H. Peter Anvin" <hpa@zytor.com>,
       "Arne Georg Gleditsch" <argggh@dolphinics.no>,
       "Andreas Herrmann" <andreas.herrmann3@amd.com>,
       "Robert Richter" <robert.richter@amd.com>,
       "Arjan van de Ven" <arjan@infradead.org>, patches@x86-64.org,
       linux-kernel@vger.kernel.org
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On Thursday, September 6, 2007 10:50 am Yinghai Lu wrote:
> On 9/6/07, Jesse Barnes <jesse.barnes@intel.com> wrote:
> > The problem with doing that is it would mean reserving some address
> > space for mmconfig usage.  If the BIOS doesn't completely describe
> > all the reserved regions via e820 or similar (apparently a common
> > problem) we may end up making mmconfig overlap with another
> > important area... It's pretty hard not to trust the BIOS here
> > without completely replacing big chunks of it.
>
> for Family 10h, you can use mmio range high beyond than the RAM
> range...( just don't conflict with HT reserved range...)

Sure, and on some Intel platforms we can configure things similarly.  
But any such changes will be platform specific.  I'm just not sure 
allocating mmconfig space ourselves is worth the trouble.  Besides, 
most machines made in the last few years can do it, as long as we look 
at the right BIOS bits (i.e. MCFG not e820) and remember to disable PCI 
device decode when probing BAR sizes for example. :)

Jesse
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