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Subject: Re: [PATCH 5/7] dt-bindings: clock: Add PCIe pipe clock definitions
From:   Stephen Boyd <sboyd@kernel.org>
Cc:     quic_srichara@quicinc.com, quic_gokulsri@quicinc.com,
        quic_sjaganat@quicinc.com, quic_kathirav@quicinc.com,
        quic_arajkuma@quicinc.com, quic_anusha@quicinc.com
To:     Devi Priya <quic_devipriy@quicinc.com>, agross@kernel.org,
        andersson@kernel.org, bhelgaas@google.com,
        devicetree@vger.kernel.org, kishon@kernel.org,
        konrad.dybcio@linaro.org, krzysztof.kozlowski+dt@linaro.org,
        kw@linux.com, linux-arm-msm@vger.kernel.org,
        linux-clk@vger.kernel.org, linux-kernel@vger.kernel.org,
        linux-pci@vger.kernel.org, linux-phy@lists.infradead.org,
        lpieralisi@kernel.org, mani@kernel.org, mturquette@baylibre.com,
        p.zabel@pengutronix.de, robh@kernel.org, svarbanov@mm-sol.com,
        vkoul@kernel.org
Date:   Tue, 14 Feb 2023 18:30:47 -0800
User-Agent: alot/0.10
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Quoting Devi Priya (2023-02-14 08:41:33)
> Add PCIe clock definitions for IPQ9574 SoC
>=20
> Co-developed-by: Anusha Rao <quic_anusha@quicinc.com>
> Signed-off-by: Anusha Rao <quic_anusha@quicinc.com>
> Signed-off-by: Devi Priya <quic_devipriy@quicinc.com>
> ---
>  include/dt-bindings/clock/qcom,ipq9574-gcc.h | 276 ++++++++++---------
>  1 file changed, 140 insertions(+), 136 deletions(-)
>=20
> diff --git a/include/dt-bindings/clock/qcom,ipq9574-gcc.h b/include/dt-bi=
ndings/clock/qcom,ipq9574-gcc.h
> index feedfdd5e00a..c89e96d568c6 100644
> --- a/include/dt-bindings/clock/qcom,ipq9574-gcc.h
> +++ b/include/dt-bindings/clock/qcom,ipq9574-gcc.h
> @@ -74,140 +74,144 @@
>  #define GCC_PCIE3_AXI_S_BRIDGE_CLK                     65
>  #define GCC_PCIE3_AXI_S_CLK                            66
>  #define PCIE0_PIPE_CLK_SRC                             67
> -#define PCIE1_PIPE_CLK_SRC                             68

Just add the new define at the end. This number and define is ABI
forever and shouldn't change.

> -#define PCIE2_PIPE_CLK_SRC                             69
> -#define PCIE3_PIPE_CLK_SRC                             70