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Tue, 14 Feb 2023 21:22:25 -0800 (PST) Received: from localhost ([135.180.226.51]) by smtp.gmail.com with ESMTPSA id n14-20020aa78a4e000000b005a8d396ae27sm2788868pfa.8.2023.02.14.21.22.24 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Tue, 14 Feb 2023 21:22:24 -0800 (PST) Date: Tue, 14 Feb 2023 21:22:24 -0800 (PST) X-Google-Original-Date: Tue, 14 Feb 2023 21:22:11 PST (-0800) Subject: Re: [PATCH 13/19] arch/riscv: rename internal name __xchg to __arch_xchg In-Reply-To: <20221222114635.1251934-14-andrzej.hajda@intel.com> CC: linux-alpha@vger.kernel.org, linux-kernel@vger.kernel.org, linux-snps-arc@lists.infradead.org, linux-arm-kernel@lists.infradead.org, linux-hexagon@vger.kernel.org, linux-ia64@vger.kernel.org, loongarch@lists.linux.dev, linux-m68k@lists.linux-m68k.org, linux-mips@vger.kernel.org, openrisc@lists.librecores.org, linux-parisc@vger.kernel.org, linuxppc-dev@lists.ozlabs.org, linux-riscv@lists.infradead.org, linux-s390@vger.kernel.org, linux-sh@vger.kernel.org, sparclinux@vger.kernel.org, linux-xtensa@linux-xtensa.org, intel-gfx@lists.freedesktop.org, dri-devel@lists.freedesktop.org, andrzej.hajda@intel.com, Arnd Bergmann , rodrigo.vivi@intel.com, akpm@linux-foundation.org, andriy.shevchenko@linux.intel.com, peterz@infradead.org, boqun.feng@gmail.com, mark.rutland@arm.com From: Palmer Dabbelt To: andrzej.hajda@intel.com Message-ID: Mime-Version: 1.0 (MHng) Content-Type: text/plain; charset=utf-8; format=flowed Content-Transfer-Encoding: 8bit Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org On Thu, 22 Dec 2022 03:46:29 PST (-0800), andrzej.hajda@intel.com wrote: > __xchg will be used for non-atomic xchg macro. > > Signed-off-by: Andrzej Hajda > --- > arch/riscv/include/asm/atomic.h | 2 +- > arch/riscv/include/asm/cmpxchg.h | 4 ++-- > 2 files changed, 3 insertions(+), 3 deletions(-) > > diff --git a/arch/riscv/include/asm/atomic.h b/arch/riscv/include/asm/atomic.h > index 0dfe9d857a762b..bba472928b5393 100644 > --- a/arch/riscv/include/asm/atomic.h > +++ b/arch/riscv/include/asm/atomic.h > @@ -261,7 +261,7 @@ c_t arch_atomic##prefix##_xchg_release(atomic##prefix##_t *v, c_t n) \ > static __always_inline \ > c_t arch_atomic##prefix##_xchg(atomic##prefix##_t *v, c_t n) \ > { \ > - return __xchg(&(v->counter), n, size); \ > + return __arch_xchg(&(v->counter), n, size); \ > } \ > static __always_inline \ > c_t arch_atomic##prefix##_cmpxchg_relaxed(atomic##prefix##_t *v, \ > diff --git a/arch/riscv/include/asm/cmpxchg.h b/arch/riscv/include/asm/cmpxchg.h > index 12debce235e52d..2f4726d3cfcc25 100644 > --- a/arch/riscv/include/asm/cmpxchg.h > +++ b/arch/riscv/include/asm/cmpxchg.h > @@ -114,7 +114,7 @@ > _x_, sizeof(*(ptr))); \ > }) > > -#define __xchg(ptr, new, size) \ > +#define __arch_xchg(ptr, new, size) \ > ({ \ > __typeof__(ptr) __ptr = (ptr); \ > __typeof__(new) __new = (new); \ > @@ -143,7 +143,7 @@ > #define arch_xchg(ptr, x) \ > ({ \ > __typeof__(*(ptr)) _x_ = (x); \ > - (__typeof__(*(ptr))) __xchg((ptr), _x_, sizeof(*(ptr))); \ > + (__typeof__(*(ptr))) __arch_xchg((ptr), _x_, sizeof(*(ptr))); \ > }) > > #define xchg32(ptr, x) \ Acked-by: Palmer Dabbelt