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Thu, 16 Feb 2023 03:02:39 -0800 (PST) Received: from [192.168.1.109] ([178.197.216.144]) by smtp.gmail.com with ESMTPSA id y23-20020a50ce17000000b004acc1374849sm669369edi.82.2023.02.16.03.02.37 (version=TLS1_3 cipher=TLS_AES_128_GCM_SHA256 bits=128/128); Thu, 16 Feb 2023 03:02:39 -0800 (PST) Message-ID: <649a8d88-0504-5aa9-d167-d25d394f3f26@linaro.org> Date: Thu, 16 Feb 2023 12:02:36 +0100 MIME-Version: 1.0 User-Agent: Mozilla/5.0 (X11; Linux x86_64; rv:102.0) Gecko/20100101 Thunderbird/102.7.1 Subject: Re: [PATCH 04/16] PCI: samsung: Use clock bulk API to get clocks Content-Language: en-US To: Shradha Todi , lpieralisi@kernel.org, kw@linux.com, robh@kernel.org, bhelgaas@google.com, krzysztof.kozlowski+dt@linaro.org, alim.akhtar@samsung.com, jingoohan1@gmail.com, Sergey.Semin@baikalelectronics.ru, lukas.bulwahn@gmail.com, hongxing.zhu@nxp.com, tglx@linutronix.de, m.szyprowski@samsung.com, jh80.chung@samsung.co, pankaj.dubey@samsung.com Cc: linux-pci@vger.kernel.org, devicetree@vger.kernel.org, linux-arm-kernel@lists.infradead.org, linux-samsung-soc@vger.kernel.org, linux-kernel@vger.kernel.org References: <20230214121333.1837-1-shradha.t@samsung.com> <20230214121333.1837-5-shradha.t@samsung.com> From: Krzysztof Kozlowski In-Reply-To: <20230214121333.1837-5-shradha.t@samsung.com> Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 7bit Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org On 14/02/2023 13:13, Shradha Todi wrote: > Adopt to clock bulk API to handle clocks. > > Signed-off-by: Shradha Todi > --- > drivers/pci/controller/dwc/pci-samsung.c | 46 ++++++------------------ > 1 file changed, 11 insertions(+), 35 deletions(-) > > diff --git a/drivers/pci/controller/dwc/pci-samsung.c b/drivers/pci/controller/dwc/pci-samsung.c > index cfe384aee754..6c07d3f151be 100644 > --- a/drivers/pci/controller/dwc/pci-samsung.c > +++ b/drivers/pci/controller/dwc/pci-samsung.c > @@ -54,8 +54,8 @@ > struct exynos_pcie { > struct dw_pcie pci; > void __iomem *elbi_base; > - struct clk *clk; > - struct clk *bus_clk; > + struct clk_bulk_data *clks; > + int clk_cnt; > struct phy *phy; > struct regulator_bulk_data supplies[2]; > }; > @@ -65,30 +65,18 @@ static int exynos_pcie_init_clk_resources(struct exynos_pcie *ep) > struct device *dev = ep->pci.dev; > int ret; > > - ret = clk_prepare_enable(ep->clk); > - if (ret) { > - dev_err(dev, "cannot enable pcie rc clock"); > + ret = devm_clk_bulk_get_all(dev, &ep->clks); > + if (ret < 0) > return ret; > - } > > - ret = clk_prepare_enable(ep->bus_clk); > - if (ret) { > - dev_err(dev, "cannot enable pcie bus clock"); > - goto err_bus_clk; > - } > + ep->clk_cnt = ret; I think this misses check if you got two clocks. Best regards, Krzysztof