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Thu, 16 Feb 2023 14:01:06 GMT Received: from [10.216.54.159] (10.80.80.8) by nasanex01c.na.qualcomm.com (10.45.79.139) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_256_GCM_SHA384) id 15.2.986.41; Thu, 16 Feb 2023 06:00:56 -0800 Message-ID: <51bd93be-f8d3-a33c-18ad-ba4a331f2bcf@quicinc.com> Date: Thu, 16 Feb 2023 19:30:53 +0530 MIME-Version: 1.0 User-Agent: Mozilla/5.0 (Windows NT 10.0; Win64; x64; rv:102.0) Gecko/20100101 Thunderbird/102.6.1 Subject: Re: [PATCH V5 5/5] firmware: scm: Modify only the DLOAD bit in TCSR register for download mode Content-Language: en-US To: Poovendhan Selvaraj , , , , , , , , , , , , , , , , , , , , CC: , , , , , , References: <20230216120012.28357-1-quic_poovendh@quicinc.com> <20230216120012.28357-6-quic_poovendh@quicinc.com> From: Mukesh Ojha In-Reply-To: <20230216120012.28357-6-quic_poovendh@quicinc.com> Content-Type: text/plain; charset="UTF-8"; format=flowed Content-Transfer-Encoding: 7bit X-Originating-IP: [10.80.80.8] X-ClientProxiedBy: nasanex01a.na.qualcomm.com (10.52.223.231) To nasanex01c.na.qualcomm.com (10.45.79.139) X-QCInternal: smtphost X-Proofpoint-Virus-Version: vendor=nai engine=6200 definitions=5800 signatures=585085 X-Proofpoint-GUID: kUFx6QUrIQ5HGL-ouXwHrXrP8Rf7V14s X-Proofpoint-ORIG-GUID: kUFx6QUrIQ5HGL-ouXwHrXrP8Rf7V14s X-Proofpoint-Virus-Version: vendor=baseguard engine=ICAP:2.0.219,Aquarius:18.0.930,Hydra:6.0.562,FMLib:17.11.170.22 definitions=2023-02-16_10,2023-02-16_01,2023-02-09_01 X-Proofpoint-Spam-Details: rule=outbound_notspam policy=outbound score=0 phishscore=0 mlxlogscore=999 adultscore=0 malwarescore=0 clxscore=1011 impostorscore=0 lowpriorityscore=0 mlxscore=0 bulkscore=0 priorityscore=1501 spamscore=0 suspectscore=0 classifier=spam adjust=0 reason=mlx scancount=1 engine=8.12.0-2212070000 definitions=main-2302160121 Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org On 2/16/2023 5:30 PM, Poovendhan Selvaraj wrote: > CrashDump collection is based on the DLOAD bit of TCSR register. > To retain other bits, we read the register and modify only the DLOAD bit as > the other bits have their own significance. > > Co-developed-by: Anusha Rao > Signed-off-by: Anusha Rao > Co-developed-by: Kathiravan Thirumoorthy > Signed-off-by: Kathiravan Thirumoorthy > Signed-off-by: Poovendhan Selvaraj > --- > Changes in V5: > - checking the return value in qcom_scm_set_download_mode function as > suggested by Srinivas Kandagatla > > Changes in V4: > - retain the orginal value of tcsr register when download mode > is not set > > drivers/firmware/qcom_scm.c | 21 ++++++++++++++++----- > 1 file changed, 16 insertions(+), 5 deletions(-) > > diff --git a/drivers/firmware/qcom_scm.c b/drivers/firmware/qcom_scm.c > index 468d4d5ab550..d88c5f14bd54 100644 > --- a/drivers/firmware/qcom_scm.c > +++ b/drivers/firmware/qcom_scm.c > @@ -407,7 +407,7 @@ int qcom_scm_set_remote_state(u32 state, u32 id) > } > EXPORT_SYMBOL(qcom_scm_set_remote_state); > > -static int __qcom_scm_set_dload_mode(struct device *dev, bool enable) > +static int __qcom_scm_set_dload_mode(struct device *dev, u32 val, bool enable) > { > struct qcom_scm_desc desc = { > .svc = QCOM_SCM_SVC_BOOT, > @@ -417,7 +417,8 @@ static int __qcom_scm_set_dload_mode(struct device *dev, bool enable) > .owner = ARM_SMCCC_OWNER_SIP, > }; > > - desc.args[1] = enable ? QCOM_SCM_BOOT_SET_DLOAD_MODE : 0; > + desc.args[1] = enable ? val | QCOM_SCM_BOOT_SET_DLOAD_MODE : > + val & ~(QCOM_SCM_BOOT_SET_DLOAD_MODE); > > return qcom_scm_call_atomic(__scm->dev, &desc, NULL); > } > @@ -426,15 +427,25 @@ static void qcom_scm_set_download_mode(bool enable) > { > bool avail; > int ret = 0; > + u32 dload_addr_val; > > avail = __qcom_scm_is_call_available(__scm->dev, > QCOM_SCM_SVC_BOOT, > QCOM_SCM_BOOT_SET_DLOAD_MODE); > + ret = qcom_scm_io_readl(__scm->dload_mode_addr, &dload_addr_val); > + > + if (ret) { > + dev_err(__scm->dev, > + "failed to read dload mode address value: %d\n", ret); > + return; > + } > + > if (avail) { > - ret = __qcom_scm_set_dload_mode(__scm->dev, enable); > + ret = __qcom_scm_set_dload_mode(__scm->dev, dload_addr_val, enable); Did you test this on a target where it comes under this if statement? does it really need to know dload_mode_addr for this target ? -Mukesh > } else if (__scm->dload_mode_addr) { > - ret = qcom_scm_io_writel(__scm->dload_mode_addr, > - enable ? QCOM_SCM_BOOT_SET_DLOAD_MODE : 0); > + ret = qcom_scm_io_writel(__scm->dload_mode_addr, enable ? > + dload_addr_val | QCOM_SCM_BOOT_SET_DLOAD_MODE : > + dload_addr_val & ~(QCOM_SCM_BOOT_SET_DLOAD_MODE)); > } else { > dev_err(__scm->dev, > "No available mechanism for setting download mode\n");