Date:   Fri, 17 Feb 2023 07:51:24 +0000
From:   Conor Dooley <conor.dooley@microchip.com>
To:     Hal Feng <hal.feng@starfivetech.com>
CC:     Conor Dooley <conor@kernel.org>, <linux-riscv@lists.infradead.org>,
        <devicetree@vger.kernel.org>, <linux-clk@vger.kernel.org>,
        Palmer Dabbelt <palmer@dabbelt.com>,
        Rob Herring <robh+dt@kernel.org>,
        Krzysztof Kozlowski <krzysztof.kozlowski+dt@linaro.org>,
        Stephen Boyd <sboyd@kernel.org>,
        Michael Turquette <mturquette@baylibre.com>,
        Philipp Zabel <p.zabel@pengutronix.de>,
        Emil Renner Berthing <emil.renner.berthing@canonical.com>,
        <linux-kernel@vger.kernel.org>
Subject: Re: [PATCH v3 07/11] dt-bindings: clock: Add StarFive JH7110 system
 clock and reset generator
Message-ID: <Y+8x/KSujhgNLAd6@wendy>
References: <20221220005054.34518-1-hal.feng@starfivetech.com>
 <20221220005054.34518-8-hal.feng@starfivetech.com>
 <Y6JB37Pd5TZoGMy4@spud>
 <7a7bccb1-4d47-3d32-36e6-4aab7b5b8dad@starfivetech.com>
 <Y6tSWB2+98a8k9Qw@spud>
 <5cf0fe71-fd17-fb28-c01e-28356081ba76@starfivetech.com>
 <Y+5z8skN2DuvxDEL@spud>
 <68e61f28-daec-ce72-726a-1fffe8e94829@starfivetech.com>
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On Fri, Feb 17, 2023 at 10:27:27AM +0800, Hal Feng wrote:
> On Thu, 16 Feb 2023 18:20:34 +0000, Conor Dooley wrote:
> > Hey Hal!
> >=20
> > On Thu, Feb 16, 2023 at 10:42:20PM +0800, Hal Feng wrote:
> >> On Tue, 27 Dec 2022 20:15:20 +0000, Conor Dooley wrote:
> >> > On Mon, Dec 26, 2022 at 12:26:32AM +0800, Hal Feng wrote:
> >> >> On Tue, 20 Dec 2022 23:14:39 +0000, Conor Dooley wrote:
> >> >> > On Tue, Dec 20, 2022 at 08:50:50AM +0800, Hal Feng wrote:
> >> >> > > From: Emil Renner Berthing <kernel@esmil.dk>
> >> >> > >=20
> >> >> > > Add bindings for the system clock and reset generator (SYSCRG) =
on the
> >> >> > > JH7110 RISC-V SoC by StarFive Ltd.
> >> >> > >=20
> >> >> > > Signed-off-by: Emil Renner Berthing <kernel@esmil.dk>
> >> >> > > Signed-off-by: Hal Feng <hal.feng@starfivetech.com>
> >> >=20
> >> >> > > +  clocks:
> >> >> > > +    items:
> >> >> > > +      - description: Main Oscillator (24 MHz)
> >> >> > > +      - description: GMAC1 RMII reference
> >> >> > > +      - description: GMAC1 RGMII RX
> >> >> > > +      - description: External I2S TX bit clock
> >> >> > > +      - description: External I2S TX left/right channel clock
> >> >> > > +      - description: External I2S RX bit clock
> >> >> > > +      - description: External I2S RX left/right channel clock
> >> >> > > +      - description: External TDM clock
> >> >> > > +      - description: External audio master clock
> >> >> >=20
> >> >> > So, from peeking at the clock driver & the dt - it looks like a b=
unch of
> >> >> > these are not actually required?
> >> >>=20
> >> >> These clocks are used as root clocks or optional parent clocks in c=
lock tree.
> >> >> Some of them are optional, but they are required if we want to desc=
ribe the
> >> >> complete clock tree of JH7110 SoC.
> >> >=20
> >> > Perhaps I have a misunderstand of what required means. To me, requir=
ed
> >> > means "you must provide this clock for the SoC to operate in all
> >> > configurations".
> >> > Optional therefore would be for things that are needed only for some
> >> > configurations and may be omitted if not required.
> >> >=20
> >> > From your comment below, boards with a JH7110 may choose not to popu=
late
> >> > both external clock inputs to a mux. In that case, "dummy" clocks sh=
ould
> >> > not have to be provided in the DT of such boards to satisfy this bin=
ding
> >> > which seems wrong to me..
> >>=20
> >> Please see the picture of these external clocks in clock tree.
> >>=20
> >> # mount -t debugfs none /mnt
> >> # cat /mnt/clk/clk_summary
> >>                                  enable  prepare  protect             =
                   duty  hardware
> >>    clock                          count    count    count        rate =
  accuracy phase  cycle    enable
> >> ----------------------------------------------------------------------=
---------------------------------
> >>  *mclk_ext*                             0        0        0    1228800=
0          0     0  50000         Y
> >>  *tdm_ext*                              0        0        0    4915200=
0          0     0  50000         Y
> >>  *i2srx_lrck_ext*                       0        0        0      19200=
0          0     0  50000         Y
> >>  *i2srx_bclk_ext*                       0        0        0    1228800=
0          0     0  50000         Y
> >>  *i2stx_lrck_ext*                       0        0        0      19200=
0          0     0  50000         Y
> >>  *i2stx_bclk_ext*                       0        0        0    1228800=
0          0     0  50000         Y
> >>  *gmac1_rgmii_rxin*                     0        0        0   12500000=
0          0     0  50000         Y
> >>     gmac1_rx                          0        0        0   125000000 =
         0     0  50000         Y
> >>        gmac1_rx_inv                   0        0        0   125000000 =
         0   180  50000         Y
> >>  *gmac1_rmii_refin*                     0        0        0    5000000=
0          0     0  50000         Y
> >>     gmac1_rmii_rtx                    0        0        0    50000000 =
         0     0  50000         Y
> >>        gmac1_tx                       0        0        0    50000000 =
         0     0  50000         N
> >>           gmac1_tx_inv                0        0        0    50000000 =
         0   180  50000         Y
> >>  *osc*                                  4        4        0    2400000=
0          0     0  50000         Y
> >>     apb_func                          0        0        0    24000000 =
         0     0  50000         Y
> >>  ...
> >>=20
> >> The clock "gmac1_rgmii_rxin" and the clock "gmac1_rmii_refin" are
> >> actually used as the parent of other clocks.
> >=20
> >> The "dummy" clocks
> >> you said are all internal clocks.
> >=20
> > No, what I meant by "dummy" clocks is that if you make clocks "required"
> > in the binding that are not needed by the hardware for operation a
> > customer of yours might have to add "dummy" clocks to their devicetree
> > to pass dtbs_check.
> >=20
> >> For the audio related clocks (mclk_ext/tdm_ext/i2srx_lrck_ext/
> >> i2srx_bclk_ext/i2stx_lrck_ext/i2stx_bclk_ext), they will be used
> >> as the parent clocks in audio related drivers. Note that some
> >> clocks need to select different clocks as parent according to
> >> requirement.
> >> So all these external clocks are required.
> >>=20
> >> >=20
> >> > It would seem to me that you need to set minItems < maxItems here to
> >> > account for that & you do in fact need clock-names.
> >> >=20
> >> >>=20
> >> >> > I'd have ploughed through this, but having read Krzysztof's comme=
nts on
> >> >> > the DTS I'm not sure that this binding is correct.
> >> >> > https://lore.kernel.org/linux-riscv/20221220011247.35560-1-hal.fe=
ng@starfivetech.com/T/#mdf67621a2344dce801aa8015d4963593a2c28bcc
> >> >> >=20
> >> >> > I *think* the DT is correct - the fixed clocks are all inputs fro=
m clock
> >> >> > sources on the board and as such they are empty in soc.dtsi and a=
re
> >> >> > populated in board.dts?
> >> >>=20
> >> >> Yes, the fixed clocks are all clock sources on the board and input =
to the SoC.
> >> >>=20
> >> >> >=20
> >> >> > However, are they all actually required? In the driver I see:
> >> >> > 	JH71X0__MUX(JH7110_SYSCLK_GMAC1_RX, "gmac1_rx", 2,
> >> >> > 		    JH7110_SYSCLK_GMAC1_RGMII_RXIN,
> >> >> > 		    JH7110_SYSCLK_GMAC1_RMII_RTX),
> >> >> > That macro is:
> >> >> > #define JH71X0__MUX(_idx, _name, _nparents, ...) [_idx] =3D {			\
> >> >> > 	.name =3D _name,								\
> >> >> > 	.flags =3D 0,								\
> >> >> > 	.max =3D ((_nparents) - 1) << JH71X0_CLK_MUX_SHIFT,			\
> >> >> > 	.parents =3D { __VA_ARGS__ },						\
> >> >> > }
> >=20
> >> >> > AFAICT, RMII reference feeds RMII_RTX & RGMII RX *is* RGMII_RXIN?
> >> >> > Does that mean you need to populate only one of GMAC1 RMII refere=
nce
> >> >> > and GMAC1 RMGII RX and the other is optional?
> >=20
> >> >> Yes, actually only one of them is chosen as the root clock
> >> >> source of the clock "gmac1_rx".
> > |  *gmac1_rgmii_rxin*  =20
> > |     gmac1_rx         =20
> > |        gmac1_rx_inv  =20
> > |  *gmac1_rmii_refin*  =20
> > |     gmac1_rmii_rtx   =20
> > |        gmac1_tx      =20
> > |           gmac1_tx_inv
> > |
> > | description: GMAC1 RMII reference
> > | description: GMAC1 RGMII RX
> >=20
> >=20
> > So you're telling me that you can either:
> > - Provide GMAC1 RMII reference and GMAC1 RGMII RX & then use different
> >   clocks for gmac1_rx and gmac1_tx
> > - Provide only GMAC1 RMII reference & use it for both gmac1_tx *and*
> >   gmac1_rx
> >=20
> > Is that correct?
>=20
> Yes, it is.

Which would then make GMAC1 RGMII RX optional, rather than required?


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