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Received-SPF: Pass (protection.outlook.com: domain of amd.com designates 165.204.84.17 as permitted sender) receiver=protection.outlook.com; client-ip=165.204.84.17; helo=SATLEXMB03.amd.com; pr=C Received: from SATLEXMB03.amd.com (165.204.84.17) by DM6NAM11FT037.mail.protection.outlook.com (10.13.172.122) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_128_GCM_SHA256) id 15.20.6111.17 via Frontend Transport; Fri, 17 Feb 2023 13:28:59 +0000 Received: from SATLEXMB04.amd.com (10.181.40.145) by SATLEXMB03.amd.com (10.181.40.144) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_128_GCM_SHA256) id 15.1.2375.34; Fri, 17 Feb 2023 07:28:58 -0600 Received: from xhdipdslab49.xilinx.com (10.180.168.240) by SATLEXMB04.amd.com (10.181.40.145) with Microsoft SMTP Server id 15.1.2375.34 via Frontend Transport; Fri, 17 Feb 2023 07:28:50 -0600 From: Nipun Gupta To: , , , , , , , , , , , , , , , , , , , , , , , , , , , CC: , , , , , Nipun Gupta Subject: [PATCH v8 2/7] iommu/arm-smmu-v3: support ops registration for CDX bus Date: Fri, 17 Feb 2023 18:58:25 +0530 Message-ID: <20230217132830.3140439-3-nipun.gupta@amd.com> X-Mailer: git-send-email 2.25.1 In-Reply-To: <20230217132830.3140439-1-nipun.gupta@amd.com> References: <20230217132830.3140439-1-nipun.gupta@amd.com> MIME-Version: 1.0 Content-Transfer-Encoding: 8bit Content-Type: text/plain X-EOPAttributedMessage: 0 X-MS-PublicTrafficType: Email X-MS-TrafficTypeDiagnostic: DM6NAM11FT037:EE_|BN9PR12MB5100:EE_ X-MS-Office365-Filtering-Correlation-Id: b4234b94-ffd1-4f91-c014-08db10eaeda9 X-MS-Exchange-SenderADCheck: 1 X-MS-Exchange-AntiSpam-Relay: 0 X-Microsoft-Antispam: BCL:0; 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X-OriginatorOrg: amd.com X-MS-Exchange-CrossTenant-OriginalArrivalTime: 17 Feb 2023 13:28:59.7836 (UTC) X-MS-Exchange-CrossTenant-Network-Message-Id: b4234b94-ffd1-4f91-c014-08db10eaeda9 X-MS-Exchange-CrossTenant-Id: 3dd8961f-e488-4e60-8e11-a82d994e183d X-MS-Exchange-CrossTenant-OriginalAttributedTenantConnectingIp: TenantId=3dd8961f-e488-4e60-8e11-a82d994e183d;Ip=[165.204.84.17];Helo=[SATLEXMB03.amd.com] X-MS-Exchange-CrossTenant-AuthSource: DM6NAM11FT037.eop-nam11.prod.protection.outlook.com X-MS-Exchange-CrossTenant-AuthAs: Anonymous X-MS-Exchange-CrossTenant-FromEntityHeader: HybridOnPrem X-MS-Exchange-Transport-CrossTenantHeadersStamped: BN9PR12MB5100 Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org With new CDX bus supported for AMD FPGA devices on ARM platform, the bus requires registration for the SMMU v3 driver. Signed-off-by: Nipun Gupta Tested-by: Nikhil Agarwal --- drivers/iommu/iommu.c | 4 ++++ 1 file changed, 4 insertions(+) diff --git a/drivers/iommu/iommu.c b/drivers/iommu/iommu.c index 1fbe53354532..c2ff7754a4b3 100644 --- a/drivers/iommu/iommu.c +++ b/drivers/iommu/iommu.c @@ -28,6 +28,7 @@ #include #include #include +#include #include #include #include @@ -129,6 +130,9 @@ static struct bus_type * const iommu_buses[] = { #ifdef CONFIG_TEGRA_HOST1X_CONTEXT_BUS &host1x_context_device_bus_type, #endif +#ifdef CONFIG_CDX_BUS + &cdx_bus_type, +#endif }; /* -- 2.25.1