Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id 337C2C636CC for ; Mon, 20 Feb 2023 16:20:41 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S231435AbjBTQUk (ORCPT ); Mon, 20 Feb 2023 11:20:40 -0500 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:35346 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S231562AbjBTQUi (ORCPT ); Mon, 20 Feb 2023 11:20:38 -0500 Received: from ams.source.kernel.org (ams.source.kernel.org [IPv6:2604:1380:4601:e00::1]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id DB1B64C2C for ; Mon, 20 Feb 2023 08:20:36 -0800 (PST) Received: from smtp.kernel.org (relay.kernel.org [52.25.139.140]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by ams.source.kernel.org (Postfix) with ESMTPS id 8D0F7B80D56 for ; Mon, 20 Feb 2023 16:20:35 +0000 (UTC) Received: by smtp.kernel.org (Postfix) with ESMTPSA id BA5D4C433EF; Mon, 20 Feb 2023 16:20:32 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=kernel.org; s=k20201202; t=1676910034; bh=GugI1KTqWeJVvUyOogjWDktfwoNGBavCoLV6GdN8qsc=; h=Date:Subject:To:Cc:References:From:In-Reply-To:From; b=mkJRVa8mY/VCQYWMTYkp32KrFyOEpyGMQ9PAktnv65UqNwY6FW3HgNMb8GSNN8PKC gIbi3BgsMHVLWhw0olblPpOXH+1I5CvAftFH7QaHeWTwp0KQ62e2upIax2qOaMPfh4 jPPL+fWh+27uQE7IRuC35rpYSPNwPiBC6oM6cE79g7eJ3LscY/G1+foTJArNaE1pX6 9z7huhzdsmjSJnDpwEUq1vjjrO4GleRNhBuLpo9toauOX2HPt5/5KAmDlyDHLD1yy0 Huk7b0pJu1InzeDdPyFMTyYfMwFHYde4y8WWSUXEHBio3Qe/Q5xIriaMI69UngI9ey LtgamDtIIyKxA== Message-ID: Date: Mon, 20 Feb 2023 18:20:29 +0200 MIME-Version: 1.0 User-Agent: Mozilla/5.0 (X11; Linux x86_64; rv:102.0) Gecko/20100101 Thunderbird/102.7.1 Subject: Re: [PATCH] phy: cadence: Sierra: Add PCIe + SGMII PHY multilink configuration To: Swapnil Jakhade , vkoul@kernel.org, kishon@kernel.org, linux-phy@lists.infradead.org, linux-kernel@vger.kernel.org Cc: mparab@cadence.com References: <20230220141216.25326-1-sjakhade@cadence.com> Content-Language: en-US From: Roger Quadros In-Reply-To: <20230220141216.25326-1-sjakhade@cadence.com> Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 7bit Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org On 20/02/2023 16:12, Swapnil Jakhade wrote: > Add register sequences for PCIe + SGMII PHY multilink configuration. > This has been validated on TI J7 platforms. > > Signed-off-by: Swapnil Jakhade Reviewed-by: Roger Quadros