Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id 82EC5C636CC for ; Mon, 20 Feb 2023 16:34:53 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S232084AbjBTQew (ORCPT ); Mon, 20 Feb 2023 11:34:52 -0500 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:45934 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S231821AbjBTQeu (ORCPT ); Mon, 20 Feb 2023 11:34:50 -0500 Received: from dfw.source.kernel.org (dfw.source.kernel.org [IPv6:2604:1380:4641:c500::1]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id 734571E293; Mon, 20 Feb 2023 08:34:46 -0800 (PST) Received: from smtp.kernel.org (relay.kernel.org [52.25.139.140]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by dfw.source.kernel.org (Postfix) with ESMTPS id AA48660ED5; Mon, 20 Feb 2023 16:34:45 +0000 (UTC) Received: by smtp.kernel.org (Postfix) with ESMTPSA id 1D75CC433EF; Mon, 20 Feb 2023 16:34:44 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=kernel.org; s=k20201202; t=1676910885; bh=r669q4trvVRbS9L9jBRi6DwmqW9Am1sW5bCegLzG1X0=; h=Date:From:To:Cc:Subject:References:In-Reply-To:From; b=BdmOjcAexhPPM1hkwnwPXT2pQfwJsqgk03ykdX/3F3sEI7jbfSx6KxmtpRb7UlNqg WCDMVBy6w3paN2roznrD9jcENaOoXsWLciUcQM+VvIHPNi6Y0TVSMDxeeY66mjYQVj v5z3tVgmWTH2zw125UoQC88kDexi2Baiy/IicZGy+4bZIp3dsYtAvuSPasJKMsjyot AS2ny8dfgwy93CCb3o5ugyhYeeHKomsNYZ992rx3+HeU1T475+F+l+wHHnDyATXgcd C3Lf7FyeGZIq1jyzGnVGjVy/XipIHCTMctgjBWobP2Y01jCzwozzUG8e87XeU96f9z JZdXJZ/V2+N1A== Date: Mon, 20 Feb 2023 08:34:42 -0800 From: Josh Poimboeuf To: KP Singh Cc: linux-kernel@vger.kernel.org, pjt@google.com, evn@google.com, tglx@linutronix.de, mingo@redhat.com, bp@alien8.de, dave.hansen@linux.intel.com, x86@kernel.org, hpa@zytor.com, peterz@infradead.org, pawan.kumar.gupta@linux.intel.com, kim.phillips@amd.com, alexandre.chartre@oracle.com, daniel.sneddon@linux.intel.com, =?utf-8?B?Sm9zw6k=?= Oliveira , Rodrigo Branco , Alexandra Sandulescu , Jim Mattson , stable@vger.kernel.org Subject: Re: [PATCH RESEND] x86/speculation: Fix user-mode spectre-v2 protection with KERNEL_IBRS Message-ID: <20230220163442.7fmaeef3oqci4ee3@treble> References: <20230220120127.1975241-1-kpsingh@kernel.org> <20230220121350.aidsipw3kd4rsyss@treble> MIME-Version: 1.0 Content-Type: text/plain; charset=utf-8 Content-Disposition: inline In-Reply-To: Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org On Mon, Feb 20, 2023 at 04:34:02AM -0800, KP Singh wrote: > On Mon, Feb 20, 2023 at 4:20 AM KP Singh wrote: > > > > On Mon, Feb 20, 2023 at 4:13 AM Josh Poimboeuf wrote: > > > > > > On Mon, Feb 20, 2023 at 01:01:27PM +0100, KP Singh wrote: > > > > +static inline bool spectre_v2_user_no_stibp(enum spectre_v2_mitigation mode) > > > > +{ > > > > + /* When IBRS or enhanced IBRS is enabled, STIBP is not needed. > > > > + * > > > > + * However, With KERNEL_IBRS, the IBRS bit is cleared on return > > > > + * to user and the user-mode code needs to be able to enable protection > > > > + * from cross-thread training, either by always enabling STIBP or > > > > + * by enabling it via prctl. > > > > + */ > > > > + return (spectre_v2_in_ibrs_mode(mode) && > > > > + !cpu_feature_enabled(X86_FEATURE_KERNEL_IBRS)); > > > > +} > > > > > > The comments and code confused me, they both seem to imply some > > > distinction between IBRS and KERNEL_IBRS, but in the kernel those are > > > functionally the same thing. e.g., the kernel doesn't have a user IBRS > > > mode. > > > > > > And, unless I'm missing some subtlety here, it seems to be a convoluted > > > way of saying that eIBRS doesn't need STIBP in user space. > > Actually, there is a subtlety, STIBP is not needed in IBRS and eIBRS > however, with KERNEL_IBRS we only enable IBRS (by setting and > unsetting the IBRS bit of SPEC_CTL) in the kernel context and this is > why we need to allow STIBP in userspace. If it were for pure IBRS, we > would not need it either (based on my reading). Now, with > spectre_v2_in_ibrs_mode, as per the current implementation implies > that KERNEL_IBRS is chosen, but this may change. Also, I would also > prefer to have it more readable in the sense that: > > "If the kernel decides to write 0 to the IBRS bit on returning to the > user, STIBP needs to to be allowed in user space" We will never enable IBRS in user space. We tried that years ago and it was very slow. -- Josh