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[2001:1ae9:1c2:4c00:20f:c6b4:1e57:7965]) by smtp.gmail.com with ESMTPSA id ke27-20020a17090798fb00b008b12b9c6c49sm6041450ejc.125.2023.02.20.09.54.30 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Mon, 20 Feb 2023 09:54:31 -0800 (PST) Date: Mon, 20 Feb 2023 18:54:29 +0100 From: Andrew Jones To: Sunil V L Cc: Palmer Dabbelt , Albert Ou , Paul Walmsley , "Rafael J . Wysocki" , Len Brown , Thomas Gleixner , Marc Zyngier , Jonathan Corbet , linux-riscv@lists.infradead.org, linux-acpi@vger.kernel.org, linux-doc@vger.kernel.org, linux-kernel@vger.kernel.org, Conor Dooley , Anup Patel , Atish Patra , "Rafael J . Wysocki" Subject: Re: [PATCH V2 13/21] RISC-V: cpu: Enable cpuinfo for ACPI systems Message-ID: <20230220175429.dzojoryw2dhhbodl@orel> References: <20230216182043.1946553-1-sunilvl@ventanamicro.com> <20230216182043.1946553-14-sunilvl@ventanamicro.com> MIME-Version: 1.0 Content-Type: text/plain; charset=us-ascii Content-Disposition: inline In-Reply-To: <20230216182043.1946553-14-sunilvl@ventanamicro.com> Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org On Thu, Feb 16, 2023 at 11:50:35PM +0530, Sunil V L wrote: > On ACPI based platforms, few details like ISA need to be read > from the ACPI table. Enable cpuinfo on ACPI based systems. > > Signed-off-by: Sunil V L > Acked-by: Rafael J. Wysocki > --- > arch/riscv/kernel/cpu.c | 31 ++++++++++++++++++++++++------- > 1 file changed, 24 insertions(+), 7 deletions(-) > > diff --git a/arch/riscv/kernel/cpu.c b/arch/riscv/kernel/cpu.c > index 1b9a5a66e55a..a227c0661b19 100644 > --- a/arch/riscv/kernel/cpu.c > +++ b/arch/riscv/kernel/cpu.c > @@ -3,10 +3,12 @@ > * Copyright (C) 2012 Regents of the University of California > */ > > +#include > #include > #include > #include > #include > +#include > #include > #include > #include > @@ -256,26 +258,41 @@ static void c_stop(struct seq_file *m, void *v) > { > } > > +static void acpi_print_hart_info(struct seq_file *m, unsigned long cpu) > +{ > + const char *isa; > + > + if (!acpi_get_riscv_isa(NULL, get_acpi_id_for_cpu(cpu), &isa)) > + print_isa(m, isa); > +} > + > static int c_show(struct seq_file *m, void *v) > { > unsigned long cpu_id = (unsigned long)v - 1; > - struct device_node *node = of_get_cpu_node(cpu_id, NULL); > struct riscv_cpuinfo *ci = per_cpu_ptr(&riscv_cpuinfo, cpu_id); > + struct device_node *node; > const char *compat, *isa; > > seq_printf(m, "processor\t: %lu\n", cpu_id); > seq_printf(m, "hart\t\t: %lu\n", cpuid_to_hartid_map(cpu_id)); > - if (!of_property_read_string(node, "riscv,isa", &isa)) > - print_isa(m, isa); > + > + if (acpi_disabled) { > + node = of_get_cpu_node(cpu_id, NULL); > + if (!of_property_read_string(node, "riscv,isa", &isa)) > + print_isa(m, isa); > + if (!of_property_read_string(node, "compatible", &compat) && > + strcmp(compat, "riscv")) > + seq_printf(m, "uarch\t\t: %s\n", compat); > + of_node_put(node); > + } else { > + acpi_print_hart_info(m, cpu_id); I don't think we need the helper function for the two lines which would otherwise nicely complement the two similar DT lines above. > + } > + > print_mmu(m); > - if (!of_property_read_string(node, "compatible", &compat) > - && strcmp(compat, "riscv")) > - seq_printf(m, "uarch\t\t: %s\n", compat); This will now print uarch before mmu for DT systems. > seq_printf(m, "mvendorid\t: 0x%lx\n", ci->mvendorid); > seq_printf(m, "marchid\t\t: 0x%lx\n", ci->marchid); > seq_printf(m, "mimpid\t\t: 0x%lx\n", ci->mimpid); > seq_puts(m, "\n"); > - of_node_put(node); > > return 0; > } > -- > 2.34.1 > Thanks, drew