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([2001:b07:6468:f312:63a7:c72e:ea0e:6045]) by smtp.googlemail.com with ESMTPSA id c4-20020a50d644000000b004aabb714230sm2711546edj.35.2023.02.20.22.48.50 (version=TLS1_3 cipher=TLS_AES_128_GCM_SHA256 bits=128/128); Mon, 20 Feb 2023 22:48:52 -0800 (PST) Message-ID: <53900813-ff1b-2451-d962-6114b3d4ade0@redhat.com> Date: Tue, 21 Feb 2023 07:48:48 +0100 MIME-Version: 1.0 User-Agent: Mozilla/5.0 (X11; Linux x86_64; rv:102.0) Gecko/20100101 Thunderbird/102.7.1 Subject: Re: [PATCH v2 05/29] LoongArch: KVM: Add vcpu related header files Content-Language: en-US To: maobibo , Xi Ruoyao , Tianrui Zhao Cc: Huacai Chen , WANG Xuerui , Greg Kroah-Hartman , loongarch@lists.linux.dev, linux-kernel@vger.kernel.org, kvm@vger.kernel.org, Jens Axboe , Mark Brown , Alex Deucher , Oliver Upton References: <20230220065735.1282809-1-zhaotianrui@loongson.cn> <20230220065735.1282809-6-zhaotianrui@loongson.cn> <497693ca2cbc443c1d9f796c3aace6c9987bec72.camel@xry111.site> <7d6125dd-29e8-14d8-b1d7-d8c14d7bec80@loongson.cn> From: Paolo Bonzini In-Reply-To: <7d6125dd-29e8-14d8-b1d7-d8c14d7bec80@loongson.cn> Content-Type: text/plain; charset=UTF-8; format=flowed Content-Transfer-Encoding: 8bit Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org On 2/21/23 07:46, maobibo wrote: >>> +       asm volatile ( >>> +               "parse_r __reg, %[val]\n\t" >>> +               ".word 0x5 << 24 | %[reg] << 10 | 0 << 5 | __reg\n\t" >> Don't do this. You should add the instruction to binutils first, then >> make CONFIG_KVM depend on the assembler supporting this instruction. >> This is completely unreadable and only fine for an internal PoC. > We are preparing to submit these instruction support for binutils, > however it is still necessary. Supposing that it is supported in future > gcc version, we can not drop existing gcc 12/13 supporting to compiling > kernel with LoongArch architecture. > > Maybe there will be human readable code like this: > #if GCC_SUPPORT_KVM_INSTR > ... > #else > asm volatile (".word " > ... > #endif I agree, just add a comment with what would be the assembly code, i.e. something like /* Instructions only available in binutils v.... or later */ asm volatile ( "parse_r __reg, %[val]\n\t" /* instrname %[val], %[reg] */ ".word 0x5 << 24 | %[reg] << 10 | 0 << 5 | __reg\n\t" Paolo