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[83.9.2.151]) by smtp.gmail.com with ESMTPSA id c22-20020ac25316000000b004db3e445f1fsm611983lfh.97.2023.02.21.09.47.12 (version=TLS1_3 cipher=TLS_AES_128_GCM_SHA256 bits=128/128); Tue, 21 Feb 2023 09:47:13 -0800 (PST) Message-ID: <82f86391-15dc-3613-e4ce-cdeb1ee49fd8@linaro.org> Date: Tue, 21 Feb 2023 18:47:11 +0100 MIME-Version: 1.0 User-Agent: Mozilla/5.0 (X11; Linux x86_64; rv:102.0) Gecko/20100101 Thunderbird/102.8.0 Subject: Re: [PATCH v2 2/2] arm64: dts: qcom: sm8450: Add IMEM and PIL info region Content-Language: en-US To: Mukesh Ojha , agross@kernel.org, andersson@kernel.org, robh+dt@kernel.org, krzysztof.kozlowski+dt@linaro.org, elder@linaro.org Cc: linux-arm-msm@vger.kernel.org, devicetree@vger.kernel.org, linux-kernel@vger.kernel.org References: <1676986616-21378-1-git-send-email-quic_mojha@quicinc.com> <1676986616-21378-2-git-send-email-quic_mojha@quicinc.com> From: Konrad Dybcio In-Reply-To: <1676986616-21378-2-git-send-email-quic_mojha@quicinc.com> Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 7bit Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org On 21.02.2023 14:36, Mukesh Ojha wrote: > Add a simple-mfd representing IMEM on SM8450 and define the PIL > relocation info region, so that post mortem tools will be able > to locate the loaded remoteprocs. > > Signed-off-by: Mukesh Ojha > --- > Changes in v2: > - put ranges after regs and corrected the sram node position. > > arch/arm64/boot/dts/qcom/sm8450.dtsi | 14 ++++++++++++++ > 1 file changed, 14 insertions(+) > > diff --git a/arch/arm64/boot/dts/qcom/sm8450.dtsi b/arch/arm64/boot/dts/qcom/sm8450.dtsi > index 1a744a3..2a4f4ac 100644 > --- a/arch/arm64/boot/dts/qcom/sm8450.dtsi > +++ b/arch/arm64/boot/dts/qcom/sm8450.dtsi > @@ -3814,6 +3814,20 @@ > }; > }; > > + sram@146aa000 { Looks like it's not sorted properly? Should be between TLMM and apss_smmu address-wise. Konrad > + compatible = "qcom,sm8450-imem", "syscon", "simple-mfd"; > + reg = <0 0x146aa000 0 0x1000>; > + ranges = <0 0 0x146aa000 0x1000>; > + > + #address-cells = <1>; > + #size-cells = <1>; > + > + pil-reloc@94c { > + compatible = "qcom,pil-reloc-info"; > + reg = <0x94c 0xc8>; > + }; > + }; > + > timer@17420000 { > compatible = "arm,armv7-timer-mem"; > #address-cells = <1>;