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Subject: Re: [PATCH 0/7] MIPS DMA coherence fixes
From:   Jiaxun Yang <jiaxun.yang@flygoat.com>
In-Reply-To: <ed2d7750-786d-82a1-5e79-1f216a682b20@arm.com>
Date:   Tue, 21 Feb 2023 19:55:05 +0000
Cc:     Christoph Hellwig <hch@lst.de>,
        "linux-mips@vger.kernel.org" <linux-mips@vger.kernel.org>,
        linux-kernel@vger.kernel.org, linuxppc-dev@lists.ozlabs.org,
        Thomas Bogendoerfer <tsbogend@alpha.franken.de>,
        mpe@ellerman.id.au, paul.walmsley@sifive.com, palmer@dabbelt.com,
        Rob Herring <robh+dt@kernel.org>, m.szyprowski@samsung.com
Content-Transfer-Encoding: quoted-printable
Message-Id: <34578218-DC7A-4C8B-A01A-AD64831CCB43@flygoat.com>
References: <20230221124613.2859-1-jiaxun.yang@flygoat.com>
 <20230221175423.GA15247@lst.de>
 <A8AC22A0-E883-4D9B-A629-5A3721B976C5@flygoat.com>
 <ed2d7750-786d-82a1-5e79-1f216a682b20@arm.com>
To:     Robin Murphy <robin.murphy@arm.com>
Precedence: bulk


> 2023=E5=B9=B42=E6=9C=8821=E6=97=A5 19:46=EF=BC=8CRobin Murphy =
<robin.murphy@arm.com> =E5=86=99=E9=81=93=EF=BC=9A
>=20
> On 2023-02-21 18:15, Jiaxun Yang wrote:
>>> 2023=E5=B9=B42=E6=9C=8821=E6=97=A5 17:54=EF=BC=8CChristoph Hellwig =
<hch@lst.de> =E5=86=99=E9=81=93=EF=BC=9A
>>>=20
>>> Can you explain the motivation here?  Also why riscv patches are at
>>> the end of a mips f=D1=96xes series?
>> Ah sorry for any confusion.
>> So the main purpose of this patch is to fix MIPS=E2=80=99s broken =
per-device coherency.
>> To be more precise, we want to be able to control the default =
coherency for all devices probed from
>> devicetree in early boot code.
>=20
> Including the patch which actually does that would be helpful. As it =
is, patches 4-7 here just appear to be moving an option around for no =
practical effect.

Well the affect is default coherency of devicetree probed devices are =
now following dma_default_coherent
instead of a static Kconfig option. For MIPS platform, =
dma_default_coherent will be determined by boot code.

Thanks
- Jiaxun