Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id B5217C64ED6 for ; Thu, 23 Feb 2023 05:52:34 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S233234AbjBWFwd (ORCPT ); Thu, 23 Feb 2023 00:52:33 -0500 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:34348 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S232470AbjBWFwb (ORCPT ); Thu, 23 Feb 2023 00:52:31 -0500 Received: from fd01.gateway.ufhost.com (fd01.gateway.ufhost.com [61.152.239.71]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id BACA24A1C4; Wed, 22 Feb 2023 21:52:29 -0800 (PST) Received: from EXMBX165.cuchost.com (unknown [175.102.18.54]) (using TLSv1 with cipher DHE-RSA-AES256-SHA (256/256 bits)) (Client CN "EXMBX165", Issuer "EXMBX165" (not verified)) by fd01.gateway.ufhost.com (Postfix) with ESMTP id 4F5FA24E1C6; Thu, 23 Feb 2023 13:52:22 +0800 (CST) Received: from EXMBX172.cuchost.com (172.16.6.92) by EXMBX165.cuchost.com (172.16.6.75) with Microsoft SMTP Server (TLS) id 15.0.1497.42; Thu, 23 Feb 2023 13:52:22 +0800 Received: from [192.168.125.82] (113.72.147.165) by EXMBX172.cuchost.com (172.16.6.92) with Microsoft SMTP Server (TLS) id 15.0.1497.42; Thu, 23 Feb 2023 13:52:21 +0800 Message-ID: Date: Thu, 23 Feb 2023 13:52:20 +0800 MIME-Version: 1.0 User-Agent: Mozilla/5.0 (Windows NT 10.0; Win64; x64; rv:102.0) Gecko/20100101 Thunderbird/102.3.2 Subject: Re: [PATCH v4 10/19] dt-bindings: clock: Add StarFive JH7110 always-on clock and reset generator Content-Language: en-US To: Conor Dooley CC: , , , Stephen Boyd , "Michael Turquette" , Philipp Zabel , Rob Herring , Krzysztof Kozlowski , Palmer Dabbelt , Paul Walmsley , Albert Ou , Ben Dooks , Daniel Lezcano , Thomas Gleixner , Marc Zyngier , "Emil Renner Berthing" , References: <20230221024645.127922-1-hal.feng@starfivetech.com> <20230221024645.127922-11-hal.feng@starfivetech.com> From: Hal Feng In-Reply-To: Content-Type: text/plain; charset="UTF-8" Content-Transfer-Encoding: 7bit X-Originating-IP: [113.72.147.165] X-ClientProxiedBy: EXCAS064.cuchost.com (172.16.6.24) To EXMBX172.cuchost.com (172.16.6.92) X-YovoleRuleAgent: yovoleflag Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org On Tue, 21 Feb 2023 17:26:52 +0000, Conor Dooley wrote: > On Tue, Feb 21, 2023 at 10:46:36AM +0800, Hal Feng wrote: >> From: Emil Renner Berthing >> >> Add bindings for the always-on clock and reset generator (AONCRG) on the >> JH7110 RISC-V SoC by StarFive Ltd. > >> + clocks: >> + items: >> + - description: Main Oscillator (24 MHz) >> + - description: RTC Oscillator (32.768 kHz) >> + - description: GMAC0 RMII reference >> + - description: GMAC0 RGMII RX >> + - description: STG AXI/AHB >> + - description: APB Bus >> + - description: GMAC0 GTX > > Ditto here, are some of these clocks, especially gmac0, also optional? The clock "rtc_osc" and "gmac0_rmii_refin" are optional, the other clocks are required. I will modify accordingly. Thanks. Best regards, Hal > >> + >> + clock-names: >> + items: >> + - const: osc >> + - const: rtc_osc >> + - const: gmac0_rmii_refin >> + - const: gmac0_rgmii_rxin >> + - const: stg_axiahb >> + - const: apb_bus >> + - const: gmac0_gtxclk