Message-ID: <701ce2da00e559d517d4e48bd5d88ccae1198e44.camel@infradead.org>
Subject: Re: [PATCH v9 0/8] Parallel CPU bringup for x86_64
From:   David Woodhouse <dwmw2@infradead.org>
To:     Thomas Gleixner <tglx@linutronix.de>,
        Usama Arif <usama.arif@bytedance.com>, kim.phillips@amd.com
Cc:     arjan@linux.intel.com, mingo@redhat.com, bp@alien8.de,
        dave.hansen@linux.intel.com, hpa@zytor.com, x86@kernel.org,
        pbonzini@redhat.com, paulmck@kernel.org,
        linux-kernel@vger.kernel.org, kvm@vger.kernel.org,
        rcu@vger.kernel.org, mimoja@mimoja.de, hewenliang4@huawei.com,
        thomas.lendacky@amd.com, seanjc@google.com, pmenzel@molgen.mpg.de,
        fam.zheng@bytedance.com, punit.agrawal@bytedance.com,
        simon.evans@bytedance.com, liangma@liangbit.com
Date:   Thu, 23 Feb 2023 11:07:29 +0000
In-Reply-To: <87a615mz2x.ffs@tglx>
References: <20230215145425.420125-1-usama.arif@bytedance.com>
         <62ee53770b4010f065346b7f2a1200013836be97.camel@infradead.org>
         <87a615mz2x.ffs@tglx>
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On Wed, 2023-02-22 at 17:42 +0100, Thomas Gleixner wrote:
> David!
>=20
> On Wed, Feb 22 2023 at 10:11, David Woodhouse wrote:
> > On Wed, 2023-02-15 at 14:54 +0000, Usama Arif wrote:
> > So the next thing that might be worth looking at is allowing the APs
> > all to be running their hotplug thread simultaneously, bringing
> > themselves from CPUHP_BRINGUP_CPU to CPUHP_AP_ONLINE. This series eats
> > the initial INIT/SIPI/SIPI latency, but if there's any significant time
> > in the AP hotplug thread, that could be worth parallelising.
>=20
> On a 112 CPU machine (64 cores, HT enabled) the bringup takes
>=20
> Setup and SIPIs sent:=C2=A0=C2=A0=C2=A0 49 ms
> Bringup each CPU:=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0516 ms
>=20
> That's about 500 ms faster than a non-parallel bringup!
>=20
> Now looking at the 516 ms, which is ~4.7 ms/CPU. The vast majority of the
> time is spent on the APs in
>=20
> =C2=A0=C2=A0=C2=A0=C2=A0 cpu_init() -> ucode_cpu_init()
>=20
> for the primary threads of each core. The secondary threads are quickly
> (1us) out of ucode_cpu_init() because the primary thread already loaded
> it.
>=20
> A microcode load on that machine takes ~7.5 ms per primary thread on
> average which sums up to 7.5 * 55 =3D 412.5 ms
>=20
> The threaded bringup after CPU_AP_ONLINE takes about 100us per CPU.

Nice analysis; thanks!

> identify_secondary_cpu() is one of the longer functions which takes
> ~125us / CPU summing up to 13ms

Hm, shouldn't that one already be parallelised by my 'part 2' patch?

It's called from smp_store_cpu_info(), from smp_callin(), which is
called from somewhere in the middle of start_secondary().

And if the comments I helpfully added to that function for the benefit
of our future selves are telling the truth, the AP is free to get that
far once the BSP has set its bit in cpu_callout_mask, which happens in
do_wait_cpu_initialized().

So
https://git.infradead.org/users/dwmw2/linux.git/commitdiff/4b5731e05b0#patc=
h3
ought to parallelise that. But Usama emirically reported that 'part 2'
didn't add any noticeable benefit, not even those 13ms? On a *larger*
machine.


> The TSC sync check for the first CPU on the second socket consumes
> 20ms. That's only once per socket, intra socket is using MSR_TSC_ADJUST,
> which is more or less free.
>=20
> So the 516 ms are wasted here:
>=20
> =C2=A0=C2=A0 total=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=
=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=
=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0 516 ms
> =C2=A0=C2=A0 ucode_cpu_init()=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=
=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=
=A0 412 ms
> =C2=A0=C2=A0 identify_secondary_cpu()=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=
=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0 13 ms
> =C2=A0=C2=A0 2ndsocket_tsc_sync=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=
=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0 20=
 ms
> =C2=A0=C2=A0 threaded bringup=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=
=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=
=A0=C2=A0 12 ms
> =C2=A0=C2=A0 rest=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=
=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=
=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0 59 ms
>=20
> So the rest is about 530us per CPU, which is just the sum of many small
> functions, lock contentions...
>=20
> Getting rid of the micro code overhead is possible. There is no reason
> to serialize that between the cores. But it needs serialization vs. HT
> siblings, which requires to move identify_secondary_cpu() and its caller
> smp_store_cpu_info() ahead of the synchronization point and then have
> serialization between the siblings. That's going to be a major surgery
> and inspection effort to ensure that there are no hidden assumptions
> about global hotplug serialization.=20
>=20
> So that would cut the total cost down to ~100ms plus the
> preparatory/SIPI stage of 60ms which sums up to about 160ms and about
> 1.5ms per CPU total.
>=20
> Further optimization starts to be questionable IMO. It's surely possible
> somehow, but then you really have to go and inspect each and every
> function in those code pathes, add local locking, etc. Not to talk about
> the required mess in the core code to support that.
>=20
> The low hanging fruit which brings most is the identification/topology
> muck and the microcode loading. That needs to be addressed first anyway.

Agreed, thanks.


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