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Fri, 24 Feb 2023 03:17:57 -0800 (PST) Received: from [192.168.1.20] ([178.197.216.144]) by smtp.gmail.com with ESMTPSA id i10-20020a170906a28a00b008bda61ff999sm8119127ejz.130.2023.02.24.03.17.56 (version=TLS1_3 cipher=TLS_AES_128_GCM_SHA256 bits=128/128); Fri, 24 Feb 2023 03:17:57 -0800 (PST) Message-ID: Date: Fri, 24 Feb 2023 12:17:55 +0100 MIME-Version: 1.0 User-Agent: Mozilla/5.0 (X11; Linux x86_64; rv:102.0) Gecko/20100101 Thunderbird/102.8.0 Subject: Re: [PATCH v3 01/15] dt-bindings: display/msm: gpu: Document GMU wrapper-equipped A6xx Content-Language: en-US To: Konrad Dybcio , Rob Clark , Abhinav Kumar , Dmitry Baryshkov , Sean Paul , David Airlie , Daniel Vetter , Rob Herring , Krzysztof Kozlowski , Bjorn Andersson , Konrad Dybcio , Akhil P Oommen Cc: linux-arm-msm@vger.kernel.org, dri-devel@lists.freedesktop.org, freedreno@lists.freedesktop.org, devicetree@vger.kernel.org, linux-kernel@vger.kernel.org, Rob Clark References: <20230223-topic-gmuwrapper-v3-0-5be55a336819@linaro.org> <20230223-topic-gmuwrapper-v3-1-5be55a336819@linaro.org> From: Krzysztof Kozlowski In-Reply-To: <20230223-topic-gmuwrapper-v3-1-5be55a336819@linaro.org> Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 7bit Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org On 23/02/2023 13:06, Konrad Dybcio wrote: > GMU wrapper-equipped A6xx GPUs require clocks and clock-names to be > specified under the GPU node, just like their older cousins. > Account for that. > > Signed-off-by: Konrad Dybcio > --- > .../devicetree/bindings/display/msm/gpu.yaml | 63 ++++++++++++++++++---- > 1 file changed, 53 insertions(+), 10 deletions(-) > > diff --git a/Documentation/devicetree/bindings/display/msm/gpu.yaml b/Documentation/devicetree/bindings/display/msm/gpu.yaml > index d4191cca71fb..e6d3160601bc 100644 > --- a/Documentation/devicetree/bindings/display/msm/gpu.yaml > +++ b/Documentation/devicetree/bindings/display/msm/gpu.yaml > @@ -36,10 +36,7 @@ properties: > > reg-names: > minItems: 1 > - items: > - - const: kgsl_3d0_reg_memory > - - const: cx_mem > - - const: cx_dbgc > + maxItems: 3 > > interrupts: > maxItems: 1 > @@ -147,26 +144,72 @@ allOf: > description: GPU Alternative Memory Interface clock > - const: gfx3d > description: GPU 3D engine clock > + - const: gmu > + description: CX GMU clock > - const: rbbmtimer > description: GPU RBBM Timer for Adreno 5xx series > - const: rbcpr > description: GPU RB Core Power Reduction clock > + - const: xo > + description: GPUCC clocksource clock > minItems: 2 > - maxItems: 7 > + maxItems: 9 Your commit says A6xx but this is a3-5xx. I don't understand this change. > > required: > - clocks > - clock-names > + > - if: > properties: > compatible: > contains: > - pattern: '^qcom,adreno-6[0-9][0-9]\.[0-9]$' > - > - then: # Since Adreno 6xx series clocks should be defined in GMU > + enum: > + - qcom,adreno-610.0 > + - qcom,adreno-619.1 > + then: > properties: > - clocks: false > - clock-names: false > + clock-names: > + items: > + - const: core > + description: GPU Core clock > + - const: iface > + description: GPU Interface clock > + - const: mem_iface > + description: GPU Memory Interface clock > + - const: alt_mem_iface > + description: GPU Alternative Memory Interface clock > + - const: gmu > + description: CX GMU clock > + - const: xo > + description: GPUCC clocksource clock > + > + reg-names: > + minItems: 1 > + items: > + - const: kgsl_3d0_reg_memory > + - const: cx_dbgc > + > + required: > + - clocks > + - clock-names > + else: > + if: > + properties: > + compatible: > + contains: > + pattern: '^qcom,adreno-6[0-9][0-9]\.[0-9]$' > + > + then: # Starting with A6xx, the clocks are usually defined in the GMU node The comment is not accurate anymore. Best regards, Krzysztof