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(075-129-116-198.res.spectrum.com. [75.129.116.198]) by smtp.gmail.com with ESMTPSA id e26-20020a05620a015a00b0073b399700adsm1276131qkn.3.2023.02.24.07.42.44 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Fri, 24 Feb 2023 07:42:44 -0800 (PST) From: Brian Gerst To: linux-kernel@vger.kernel.org, x86@kernel.org Cc: David Woodhouse , Usama Arif , Thomas Gleixner , Borislav Petkov , "H . Peter Anvin" , Peter Zijlstra , Andy Lutomirski , Ingo Molnar , Brian Gerst Subject: [PATCH v2 5/5] x86/smpboot: Remove STARTUP_SECONDARY Date: Fri, 24 Feb 2023 10:42:35 -0500 Message-Id: <20230224154235.277350-6-brgerst@gmail.com> X-Mailer: git-send-email 2.39.2 In-Reply-To: <20230224154235.277350-1-brgerst@gmail.com> References: <20230224154235.277350-1-brgerst@gmail.com> MIME-Version: 1.0 Content-Transfer-Encoding: 8bit Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org All CPUs now use the same setup path. Remove STARTUP_SECONDARY and renumber the remaining flags. Signed-off-by: Brian Gerst --- arch/x86/include/asm/smp.h | 5 ++--- arch/x86/kernel/head_64.S | 5 ++--- arch/x86/kernel/smpboot.c | 6 +++--- 3 files changed, 7 insertions(+), 9 deletions(-) diff --git a/arch/x86/include/asm/smp.h b/arch/x86/include/asm/smp.h index b4b29e052b6e..97a36d029b0e 100644 --- a/arch/x86/include/asm/smp.h +++ b/arch/x86/include/asm/smp.h @@ -202,8 +202,7 @@ extern unsigned int smpboot_control; #endif /* !__ASSEMBLY__ */ /* Control bits for startup_64 */ -#define STARTUP_SECONDARY 0x80000000 -#define STARTUP_APICID_CPUID_0B 0x40000000 -#define STARTUP_APICID_CPUID_01 0x20000000 +#define STARTUP_APICID_CPUID_0B 0x80000000 +#define STARTUP_APICID_CPUID_01 0x40000000 #endif /* _ASM_X86_SMP_H */ diff --git a/arch/x86/kernel/head_64.S b/arch/x86/kernel/head_64.S index 8bd29ab523dd..f629bf74217b 100644 --- a/arch/x86/kernel/head_64.S +++ b/arch/x86/kernel/head_64.S @@ -240,9 +240,8 @@ SYM_INNER_LABEL(secondary_startup_64_no_verify, SYM_L_GLOBAL) * used to look up the CPU number. For booting a single CPU, the * CPU number is encoded in smpboot_control. * - * Bit 31 STARTUP_SECONDARY flag (checked above) - * Bit 30 STARTUP_APICID_CPUID_0B flag (use CPUID 0x0b) - * Bit 29 STARTUP_APICID_CPUID_01 flag (use CPUID 0x01) + * Bit 31 STARTUP_APICID_CPUID_0B flag (use CPUID 0x0b) + * Bit 30 STARTUP_APICID_CPUID_01 flag (use CPUID 0x01) * Bit 0-24 CPU# if STARTUP_APICID_CPUID_xx flags are not set */ movl smpboot_control(%rip), %ecx diff --git a/arch/x86/kernel/smpboot.c b/arch/x86/kernel/smpboot.c index e1a2843c2841..c159a5c2df9f 100644 --- a/arch/x86/kernel/smpboot.c +++ b/arch/x86/kernel/smpboot.c @@ -1140,7 +1140,7 @@ static int do_boot_cpu(int apicid, int cpu, struct task_struct *idle, early_gdt_descr.address = (unsigned long)get_cpu_gdt_rw(cpu); initial_stack = idle->thread.sp; } else if (!do_parallel_bringup) { - smpboot_control = STARTUP_SECONDARY | cpu; + smpboot_control = cpu; } /* Enable the espfix hack for this CPU */ @@ -1580,7 +1580,7 @@ void __init native_smp_prepare_cpus(unsigned int max_cpus) */ if (eax) { pr_debug("Using CPUID 0xb for parallel CPU startup\n"); - smpboot_control = STARTUP_SECONDARY | STARTUP_APICID_CPUID_0B; + smpboot_control = STARTUP_APICID_CPUID_0B; } else { pr_info("Disabling parallel bringup because CPUID 0xb looks untrustworthy\n"); do_parallel_bringup = false; @@ -1588,7 +1588,7 @@ void __init native_smp_prepare_cpus(unsigned int max_cpus) } else if (do_parallel_bringup) { /* Without X2APIC, what's in CPUID 0x01 should suffice. */ pr_debug("Using CPUID 0x1 for parallel CPU startup\n"); - smpboot_control = STARTUP_SECONDARY | STARTUP_APICID_CPUID_01; + smpboot_control = STARTUP_APICID_CPUID_01; } if (do_parallel_bringup) { -- 2.39.2