Date:   Sun, 26 Feb 2023 12:01:43 -0600
From:   Rob Herring <robh@kernel.org>
To:     Conor Dooley <conor@kernel.org>
Cc:     Xu Yilun <yilun.xu@intel.com>,
        Conor Dooley <conor.dooley@microchip.com>,
        Daire McNamara <daire.mcnamara@microchip.com>,
        Krzysztof Kozlowski <krzysztof.kozlowski+dt@linaro.org>,
        Moritz Fischer <mdf@kernel.org>, Wu Hao <hao.wu@intel.com>,
        Tom Rix <trix@redhat.com>, linux-riscv@lists.infradead.org,
        devicetree@vger.kernel.org, linux-kernel@vger.kernel.org,
        linux-fpga@vger.kernel.org
Subject: Re: [PATCH v1 2/6] dt-bindings: soc: microchip: add a property for
 system controller flash
Message-ID: <20230226180143.GA96766-robh@kernel.org>
References: <20230217164023.14255-1-conor@kernel.org>
 <20230217164023.14255-3-conor@kernel.org>
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On Fri, Feb 17, 2023 at 04:40:19PM +0000, Conor Dooley wrote:
> From: Conor Dooley <conor.dooley@microchip.com>
> 
> The system controller "shares" a SPI flash device with a QSPI controller
> in the MSS. This flash is used to store FPGA bitstreams & other
> metadata. IAP and Auto Upgrade both write images to this flash that the
> System Controller will use to re-program the FPGA.
> 
> Add a phandle property signifying which flash device is connected to the
> system controller.
> 
> Signed-off-by: Conor Dooley <conor.dooley@microchip.com>
> ---
>  .../soc/microchip/microchip,mpfs-sys-controller.yaml   | 10 ++++++++++
>  1 file changed, 10 insertions(+)
> 
> diff --git a/Documentation/devicetree/bindings/soc/microchip/microchip,mpfs-sys-controller.yaml b/Documentation/devicetree/bindings/soc/microchip/microchip,mpfs-sys-controller.yaml
> index 04ffee3a7c59..97a7cb74cbf9 100644
> --- a/Documentation/devicetree/bindings/soc/microchip/microchip,mpfs-sys-controller.yaml
> +++ b/Documentation/devicetree/bindings/soc/microchip/microchip,mpfs-sys-controller.yaml
> @@ -26,6 +26,16 @@ properties:
>    compatible:
>      const: microchip,mpfs-sys-controller
>  
> +  microchip,bitstream-flash:
> +    $ref: "/schemas/types.yaml#/definitions/phandle"

Drop quotes.

With that,

Reviewed-by: Rob Herring <robh@kernel.org>

> +    description:
> +      The SPI flash connected to the system controller's QSPI controller.
> +      The system controller may retrieve FPGA bitstreams from this flash to
> +      perform In-Application Programming (IAP) or during device initialisation
> +      for Auto Update. The MSS and system controller have separate QSPI
> +      controllers and this flash is connected to both. Software running in the
> +      MSS can write bitstreams to the flash.
> +
>  required:
>    - compatible
>    - mboxes
> -- 
> 2.39.1
>