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[88.13.29.106]) by smtp.gmail.com with ESMTPSA id a4-20020a5d5704000000b002c559843748sm6806122wrv.10.2023.02.27.02.58.18 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Mon, 27 Feb 2023 02:58:19 -0800 (PST) From: Sergio Paracuellos To: linux-mips@vger.kernel.org Cc: tsbogend@alpha.franken.de, john@phrozen.org, linux-kernel@vger.kernel.org, git@johnthomson.fastmail.com.au Subject: [PATCH 12/12] mips: ralink: mt7620: introduce 'soc_device' initialization Date: Mon, 27 Feb 2023 11:58:06 +0100 Message-Id: <20230227105806.2394101-13-sergio.paracuellos@gmail.com> X-Mailer: git-send-email 2.25.1 In-Reply-To: <20230227105806.2394101-1-sergio.paracuellos@gmail.com> References: <20230227105806.2394101-1-sergio.paracuellos@gmail.com> MIME-Version: 1.0 Content-Transfer-Encoding: 8bit Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org MT7620 SoCs have their own 'ralink_soc_info' structure with some information about the soc itself. In order to be able to retrieve this information from driver code and avoid architecture dependencies for retrieving these details introduce this 'soc_device'. Set 'data' pointer points to the struct 'ralink_soc_info' to be able to export also current soc information using this mechanism. We need to select 'SOC_BUS' in Kconfig configuration for these SoCs. Signed-off-by: Sergio Paracuellos --- arch/mips/ralink/Kconfig | 1 + arch/mips/ralink/mt7620.c | 44 +++++++++++++++++++++++++++++++++++++++ 2 files changed, 45 insertions(+) diff --git a/arch/mips/ralink/Kconfig b/arch/mips/ralink/Kconfig index 3e01e2df96b0..088d46f16800 100644 --- a/arch/mips/ralink/Kconfig +++ b/arch/mips/ralink/Kconfig @@ -44,6 +44,7 @@ choice bool "MT7620/8" select CPU_MIPSR2_IRQ_VI select HAVE_PCI + select SOC_BUS config SOC_MT7621 bool "MT7621" diff --git a/arch/mips/ralink/mt7620.c b/arch/mips/ralink/mt7620.c index 8604d91f3375..4435f50b8d24 100644 --- a/arch/mips/ralink/mt7620.c +++ b/arch/mips/ralink/mt7620.c @@ -11,6 +11,8 @@ #include #include #include +#include +#include #include #include @@ -49,6 +51,8 @@ /* does the board have sdram or ddram */ static int dram_type; +static struct ralink_soc_info *soc_info_ptr; + static __init u32 mt7620_calc_rate(u32 ref_rate, u32 mul, u32 div) { @@ -410,6 +414,44 @@ static const char __init *mt7620_get_soc_name(struct ralink_soc_info *soc_info) } } +static const char __init *mt7620_get_soc_id_name(void) +{ + if (ralink_soc == MT762X_SOC_MT7620A) + return "mt7620a"; + else if (ralink_soc == MT762X_SOC_MT7620N) + return "mt7620n"; + else if (ralink_soc == MT762X_SOC_MT7688) + return "mt7688"; + else if (ralink_soc == MT762X_SOC_MT7628AN) + return "mt7628n"; + else + return "invalid"; +} + +static int __init mt7620_soc_dev_init(void) +{ + struct soc_device *soc_dev; + struct soc_device_attribute *soc_dev_attr; + + soc_dev_attr = kzalloc(sizeof(*soc_dev_attr), GFP_KERNEL); + if (!soc_dev_attr) + return -ENOMEM; + + soc_dev_attr->family = "Ralink"; + soc_dev_attr->soc_id = mt7620_get_soc_id_name(); + + soc_dev_attr->data = soc_info_ptr; + + soc_dev = soc_device_register(soc_dev_attr); + if (IS_ERR(soc_dev)) { + kfree(soc_dev_attr); + return PTR_ERR(soc_dev); + } + + return 0; +} +device_initcall(mt7620_soc_dev_init); + void __init prom_soc_init(struct ralink_soc_info *soc_info) { const char *name = mt7620_get_soc_name(soc_info); @@ -444,4 +486,6 @@ void __init prom_soc_init(struct ralink_soc_info *soc_info) (pmu0 & PMU_SW_SET) ? ("sw") : ("hw")); pr_info("Digital PMU set to %s control\n", (pmu1 & DIG_SW_SEL) ? ("sw") : ("hw")); + + soc_info_ptr = soc_info; } -- 2.25.1