Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id 3BEE2C64ED6 for ; Mon, 27 Feb 2023 15:19:02 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S230009AbjB0PTB (ORCPT ); Mon, 27 Feb 2023 10:19:01 -0500 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:33880 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S229720AbjB0PS4 (ORCPT ); Mon, 27 Feb 2023 10:18:56 -0500 Received: from madras.collabora.co.uk (madras.collabora.co.uk [46.235.227.172]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id 6173AD332; Mon, 27 Feb 2023 07:18:54 -0800 (PST) Received: from cryzen.lan (cpc87451-finc19-2-0-cust61.4-2.cable.virginm.net [82.11.51.62]) (using TLSv1.3 with cipher TLS_AES_256_GCM_SHA384 (256/256 bits) key-exchange X25519 server-signature RSA-PSS (4096 bits) server-digest SHA256) (No client certificate requested) (Authenticated sender: tanureal) by madras.collabora.co.uk (Postfix) with ESMTPSA id A65066602F93; Mon, 27 Feb 2023 15:18:52 +0000 (GMT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=collabora.com; s=mail; t=1677511132; bh=BZOWK6rfvJBAo+rrMVEDVF17jJpwJrzKHXdauB9aZYk=; h=From:To:Cc:Subject:Date:From; b=FLOuFAjKJJn75VH3nEocm2Y6f/4TvswwOCgM37zBwcffv5yVIhQm55MWEPaFQohqX SLkEBSApFi8kdGawyMbK+2YSUPAbjyv2ZOI6beS3ru5czOB7ThDkuCmEkWCF/awiUB ppzkDL+cTPFQdRFcX1c9CpHCcMqOEf/JN4IyZ1a3yGgEUarO1qKWhLK9rAx3hG79+v 3XoXyOmvPYPbHOe2wlPgyDLQqX9YQx7pB6Bzjw9ySaV6gUX7p5LNKUf1L4hVSfWIgo e03Yp9eHAYA8apM6bdrS7D9nLaCaMhHaLJ65ru0fA4G0LttRlCwNDf29ag+kr8UpqH a63NjUIu43F6A== From: Lucas Tanure To: Catalin Marinas , Will Deacon , Jonathan Corbet , Thomas Gleixner , Marc Zyngier , Peter Geis , Kever Yang Cc: linux-rockchip@lists.infradead.org, linux-arm-kernel@lists.infradead.org, linux-doc@vger.kernel.org, linux-kernel@vger.kernel.org, Lucas Tanure , kernel@collabora.com Subject: [RFC 0/1] ITS fails to allocate on rk3588 Date: Mon, 27 Feb 2023 15:18:46 +0000 Message-Id: <20230227151847.207922-1-lucas.tanure@collabora.com> X-Mailer: git-send-email 2.39.2 MIME-Version: 1.0 Content-Transfer-Encoding: 8bit Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org I am assisting with PCIe and networking bring-up for Rock Pi 5B (RK3588). This chip uses the same GICv3 as RK356X but has fixed the previous limitation of GIC only supporting 32-bit addresses. But the implementation decision for shareability in GICR and GITS is still the same. I read the previous thread about this topic: https://lore.kernel.org/lkml/2791594e-db60-e1d0-88e5-7e5bbd98ae4d@rock-chips.com/T/#m5dbc70ff308d81e98dd0d797e23d3fbf9c353245 From my understanding, the errata numbers Marc Zyngier is referring to are found in Arm errata documents at developer.arm.com/documentation. But I could not find Cavium or Broadcom pages for errata with those numbers in Documentation/arm64/silicon-errata.rst I could not find an errata document about this shareability issue, and by what Kever said in the previous thread this could be a RockChip design decision. Marc, as I could only find ARM errata numbers, is the errata number you were expecting generated by ARM only, or RockChip should issue a document like Arm to detail the issue? Can this shareability issue be seen as a quirk without an errata number? The following patch is based on the work of Peter Geis for the Quartz64 board and the previous thread feedback. Lucas Tanure (1): irqchip/gic-v3: Add RK3588 GICR and GITS no share workaround Documentation/arm64/silicon-errata.rst | 4 +++ arch/arm64/Kconfig | 13 ++++++++ drivers/irqchip/irq-gic-v3-its.c | 42 ++++++++++++++++++++++++++ 3 files changed, 59 insertions(+) -- 2.39.2