Date:   Mon, 27 Feb 2023 20:00:33 +0000
From:   Conor Dooley <conor@kernel.org>
To:     Hal Feng <hal.feng@starfivetech.com>
Cc:     Emil Renner Berthing <emil.renner.berthing@canonical.com>,
        linux-clk@vger.kernel.org, devicetree@vger.kernel.org,
        linux-riscv@lists.infradead.org, Stephen Boyd <sboyd@kernel.org>,
        Michael Turquette <mturquette@baylibre.com>,
        Philipp Zabel <p.zabel@pengutronix.de>,
        Rob Herring <robh+dt@kernel.org>,
        Krzysztof Kozlowski <krzysztof.kozlowski+dt@linaro.org>,
        Palmer Dabbelt <palmer@dabbelt.com>,
        Paul Walmsley <paul.walmsley@sifive.com>,
        Albert Ou <aou@eecs.berkeley.edu>,
        Ben Dooks <ben.dooks@sifive.com>,
        Daniel Lezcano <daniel.lezcano@linaro.org>,
        Thomas Gleixner <tglx@linutronix.de>,
        Marc Zyngier <maz@kernel.org>, linux-kernel@vger.kernel.org
Subject: Re: [PATCH v4 19/19] riscv: dts: starfive: Add StarFive JH7110
 VisionFive 2 board device tree
Message-ID: <Y/0L4SKKtl49C95j@spud>
References: <20230221024645.127922-1-hal.feng@starfivetech.com>
 <20230221024645.127922-20-hal.feng@starfivetech.com>
 <CAJM55Z_QMtzKeRFN1iGf498z4+vga6RBgwybCQi6aOUYCr_P-Q@mail.gmail.com>
 <2af3f84b-2c2b-dc79-c76c-9411fcbcf7ca@starfivetech.com>
 <Y/zykfydb+bJ7G2l@spud>
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On Mon, Feb 27, 2023 at 06:12:40PM +0000, Conor Dooley wrote:
> On Thu, Feb 23, 2023 at 04:50:20PM +0800, Hal Feng wrote:
> > On Tue, 21 Feb 2023 16:03:08 +0100, Emil Renner Berthing wrote:
> > > On Tue, 21 Feb 2023 at 03:47, Hal Feng <hal.feng@starfivetech.com> wr=
ote:
> > >> From: Emil Renner Berthing <kernel@esmil.dk>
> > >>
> > >> Add a minimal device tree for StarFive JH7110 VisionFive 2 board
> > >> which has version A and version B. Support booting and basic
> > >> clock/reset/pinctrl/uart drivers.
> > >>
> > >> Acked-by: Conor Dooley <conor.dooley@microchip.com>
> > >> Signed-off-by: Emil Renner Berthing <kernel@esmil.dk>
> > >> Co-developed-by: Jianlong Huang <jianlong.huang@starfivetech.com>
> > >> Signed-off-by: Jianlong Huang <jianlong.huang@starfivetech.com>
> > >> Co-developed-by: Hal Feng <hal.feng@starfivetech.com>
> > >> Signed-off-by: Hal Feng <hal.feng@starfivetech.com>
> > >> ---
> > >>  arch/riscv/boot/dts/starfive/Makefile         |   6 +-
> > >>  .../jh7110-starfive-visionfive-2-v1.2a.dts    |  13 ++
> > >>  .../jh7110-starfive-visionfive-2-v1.3b.dts    |  13 ++
> > >>  .../jh7110-starfive-visionfive-2.dtsi         | 215 +++++++++++++++=
+++
> > >>  4 files changed, 246 insertions(+), 1 deletion(-)
> > >>  create mode 100644 arch/riscv/boot/dts/starfive/jh7110-starfive-vis=
ionfive-2-v1.2a.dts
> > >>  create mode 100644 arch/riscv/boot/dts/starfive/jh7110-starfive-vis=
ionfive-2-v1.3b.dts
> > >>  create mode 100644 arch/riscv/boot/dts/starfive/jh7110-starfive-vis=
ionfive-2.dtsi
> > >>
> > >> diff --git a/arch/riscv/boot/dts/starfive/Makefile b/arch/riscv/boot=
/dts/starfive/Makefile
> > >> index 039c143cba33..cd73519b907b 100644
> > >> --- a/arch/riscv/boot/dts/starfive/Makefile
> > >> +++ b/arch/riscv/boot/dts/starfive/Makefile
> > >> @@ -1,2 +1,6 @@
> > >>  # SPDX-License-Identifier: GPL-2.0
> > >> -dtb-$(CONFIG_SOC_STARFIVE) +=3D jh7100-beaglev-starlight.dtb jh7100=
-starfive-visionfive-v1.dtb
> > >> +dtb-$(CONFIG_SOC_STARFIVE) +=3D jh7100-beaglev-starlight.dtb
> > >> +dtb-$(CONFIG_SOC_STARFIVE) +=3D jh7100-starfive-visionfive-v1.dtb
> > >> +
> > >> +dtb-$(CONFIG_SOC_STARFIVE) +=3D jh7110-starfive-visionfive-2-v1.2a.=
dtb
> > >> +dtb-$(CONFIG_SOC_STARFIVE) +=3D jh7110-starfive-visionfive-2-v1.3b.=
dtb
>=20
> If you could rebase on top of v6.3-rc1 for the next version & use ARCH_
> not SOC_ here that'd be great.
>=20
> > >> +/ {
> > >> +       aliases {
> > >> +               serial0 =3D &uart0;
> > >> +               i2c0 =3D &i2c0;
> > >> +               i2c2 =3D &i2c2;
> > >> +               i2c5 =3D &i2c5;
> > >> +               i2c6 =3D &i2c6;
> > >=20
> > > Let's keep these sorted alphabetically.
> >=20
> > OK, will fix it.
> >=20
>=20
> > > It would be great to have some sort of order to this file so it's
> > > obvious where to add new nodes. I suggest we do
> > > - root node
> > > - external clocks
> > > - other node references in alphabetical order
> > >=20
> > > You're almost there with this patch except the uart0 node is out of p=
lace.
> >=20
> > Will fix accordingly. Thanks for your suggestions.
>=20
> With Emil's suggestions implemented:
> Reviewed-by: Conor Dooley <conor.dooley@microchip.com>

Actually, there's one thing that I don't think was (explicitly?) mentioned,
could you sort the external clocks alphanumerically too?

Cheers,
Conor.


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