Message-ID: <e8782296-49bc-33a2-47b3-45c204551806@intel.com>
Date:   Mon, 27 Feb 2023 12:28:43 -0800
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Subject: Re: [PATCH -next] mux: convert mux_chip->mux to flexible array
Content-Language: en-US
To:     Jacob Keller <jacob.e.keller@intel.com>,
        Peter Rosin <peda@axentia.se>, <keescook@chromium.org>,
        <gustavoars@kernel.org>
CC:     <linux-kernel@vger.kernel.org>, <linux-i2c@vger.kernel.org>
References: <20230223014221.1710307-1-jacob.e.keller@intel.com>
From:   Jesse Brandeburg <jesse.brandeburg@intel.com>
In-Reply-To: <20230223014221.1710307-1-jacob.e.keller@intel.com>
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On 2/22/2023 5:42 PM, Jacob Keller wrote:
> The mux_chip structure size is over allocated to additionally include both
> the array of mux controllers as well as a device specific private area.
> The controllers array is then pointed to by assigning mux_chip->mux to the
> first block of extra memory, while the private area is extracted via
> mux_chip_priv() and points to the area just after the controllers.
> 
> The size of the mux_chip allocation uses direct multiplication and addition
> rather than the <linux/overflow.h> helpers. In addition, the mux_chip->mux
> struct member wastes space by having to store the pointer as part of the
> structures.
> 
> Convert struct mux_chip to use a flexible array member for the mux
> controller array. Use struct_size() and size_add() to compute the size of
> the structure while protecting against overflow.
> 
> After converting the mux pointer, notice that two 4-byte holes remain in
> the structure layout due to the alignment requirements for the dev
> sub-structure and the ops pointer.
> 
> These can be easily fixed through re-ordering the id field to the 4-byte
> hole just after the controllers member.

Looks good to me (just a driver dev, not a mux dev!). Also added
linux-i2c mailing list and a couple others for more review.

Reviewed-by: Jesse Brandeburg <jesse.brandeburg@intel.com>

related thread (cocci script) at [1]

[1]
https://lore.kernel.org/all/20230227202428.3657443-1-jacob.e.keller@intel.com/