Date:   Mon, 27 Feb 2023 23:55:48 +0100
From:   Thomas Bogendoerfer <tsbogend@alpha.franken.de>
To:     arinc9.unal@gmail.com
Cc:     John Crispin <john@phrozen.org>,
        =?utf-8?B?QXLEsW7DpyDDnE5BTA==?= <arinc.unal@arinc9.com>,
        linux-mips@vger.kernel.org, linux-kernel@vger.kernel.org,
        Sergio Paracuellos <sergio.paracuellos@gmail.com>,
        erkin.bozoglu@xeront.com
Subject: Re: [PATCH 2/2] mips: ralink: make SOC_MT7621 select PINCTRL
Message-ID: <20230227225548.GD23071@alpha.franken.de>
References: <20230221092435.22069-1-arinc.unal@arinc9.com>
 <20230221092435.22069-2-arinc.unal@arinc9.com>
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On Tue, Feb 21, 2023 at 12:24:35PM +0300, arinc9.unal@gmail.com wrote:
> From: Arınç ÜNAL <arinc.unal@arinc9.com>
> 
> Currently, out of every Ralink SoC, only the dt-binding of the MT7621 SoC
> uses pinctrl. Because of this, PINCTRL is not selected at all. Make
> SOC_MT7621 select PINCTRL.
> 
> Remove PINCTRL_MT7621, enabling it for the MT7621 SoC will be handled under
> the PINCTRL_MT7621 option.
> 
> Signed-off-by: Arınç ÜNAL <arinc.unal@arinc9.com>
> ---
>  arch/mips/ralink/Kconfig | 2 +-
>  1 file changed, 1 insertion(+), 1 deletion(-)
> 
> diff --git a/arch/mips/ralink/Kconfig b/arch/mips/ralink/Kconfig
> index 06031796c87b..83e61e147b90 100644
> --- a/arch/mips/ralink/Kconfig
> +++ b/arch/mips/ralink/Kconfig
> @@ -54,7 +54,7 @@ choice
>  		select HAVE_PCI
>  		select PCI_DRIVERS_GENERIC
>  		select SOC_BUS
> -		select PINCTRL_MT7621
> +		select PINCTRL
>  
>  		help
>  		  The MT7621 system-on-a-chip includes an 880 MHz MIPS1004Kc
> -- 
> 2.37.2

applied to mips-next.

Thomas.

-- 
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