Date:   Tue, 28 Feb 2023 08:28:05 -0400
From:   Jason Gunthorpe <jgg@nvidia.com>
To:     Jarkko Sakkinen <jarkko@kernel.org>
Cc:     Krishna Yarlagadda <kyarlagadda@nvidia.com>, robh+dt@kernel.org,
        broonie@kernel.org, peterhuewe@gmx.de,
        krzysztof.kozlowski+dt@linaro.org, linux-spi@vger.kernel.org,
        linux-tegra@vger.kernel.org, linux-integrity@vger.kernel.org,
        linux-kernel@vger.kernel.org, thierry.reding@gmail.com,
        jonathanh@nvidia.com, skomatineni@nvidia.com, ldewangan@nvidia.com
Subject: Re: [Patch V5 2/3] tpm_tis-spi: Support hardware wait polling
Message-ID: <Y/3zVdgnVz8BvGGl@ziepe.ca>
References: <20230227120702.13180-1-kyarlagadda@nvidia.com>
 <20230227120702.13180-3-kyarlagadda@nvidia.com>
 <Y/1oqr0RfD7KVA4y@kernel.org>
Content-Type: text/plain; charset=us-ascii
Content-Disposition: inline
In-Reply-To: <Y/1oqr0RfD7KVA4y@kernel.org>
MIME-Version: 1.0
X-MS-Exchange-AntiSpam-MessageData-ChunkCount: 1
X-MS-Exchange-AntiSpam-MessageData-0: =?us-ascii?Q?iVzUmIGixiEVQ09i2R5H9IiVnaUe6nnopvl7bd1T2Z4Mc5JlQ87ZP0c3Z6oX?=
 =?us-ascii?Q?76Kzl1UAfwn911wXvy+sKeFwEdkmcKcIhWsaVgq2zgOu4nm4yzLW9NPAKjpx?=
 =?us-ascii?Q?HDPRHIOl0VLCf/GWhzYz1eq/J+nS3revf518irKmAI8ab/9/1aRrR2DrFm3f?=
 =?us-ascii?Q?fR5VOfM4Tkp78bMI1Wrrqa66pqkiDpDCj0CFegzBSpE9+jT+GksFt1/JBZ36?=
 =?us-ascii?Q?1w66IpF368fpCiLgkdgW/7vfy9kYpZMAlHe6VZOHqXo1Au/OCGJlX9eGj41m?=
 =?us-ascii?Q?IAbGasPyShwhC97HIyvKU+kA0pBnzii/cl9DkcBgyRMOmZQvmY4qenPa3++z?=
 =?us-ascii?Q?JIUA6BwfSbo1QtBnhDhFn+Ya5LodHHr4aqT+8lg+/F1QWM1p70PtKL3CCmcj?=
 =?us-ascii?Q?5YSD3/kByalBBoZOYbBGwHQn/qv6p4M+Hp7zcHlji/HU+6v4DBAjL/0WtVYm?=
 =?us-ascii?Q?BW5m6xB3/Dq+Z8Lo4gmJtmE3F5OHDSsfSedVDSb5RGwBAF9j4bdhNCL5yevD?=
 =?us-ascii?Q?u5+vbwLqAGDrJ+orjwYmqblbN9ivcMT9HGs1h0jRJKzernxodh6vnmDsku1J?=
 =?us-ascii?Q?J1LPEfTmCW/BlMchU+wo97tGFxbbF47vU75LA7eaa14ndD2+61xCZQPsehib?=
 =?us-ascii?Q?G6xiIynwFZ9WkESNZH6sUiGmqvUtYVRqygkLfR2zxfZ8jd8B07iQtNRx3mAP?=
 =?us-ascii?Q?353luDxIrTMOJS4hhL7y/N1qi1g7qfAo++L8ezZ2VydU+5X2htgoNzc6oMGz?=
 =?us-ascii?Q?mDn3uSl4TFVY+0vBPxgXJsvh5+gbm3TgKVKpJ/VePWrB6Xz9//mLjAqIuUSY?=
 =?us-ascii?Q?uVseokoN2UUGvOnn47+fSlT09HK6pDo0XMjD1prQFSne6bgc4mZ9ci4Aku98?=
 =?us-ascii?Q?LA88daAIZ1DERC9C1zcp//XT/NJu6DJGhDpGS6aPnwcwQGWg0Yqi0KKnUF++?=
 =?us-ascii?Q?oPx3b2RlOcsSSBfnxKZCk0Ip+WKHy675Y5FqpmYO81Oh86ryWKtvVrHpDncq?=
 =?us-ascii?Q?VT9Ir6zKLg4O1zV39EzaJPmwQ4fIUbqDLAa9GvO8nLjpRKaONbzsde0QUBOv?=
 =?us-ascii?Q?adYc1zkSaqWM2H0nGuXbfK5S+Eu9El5M5BPWg13UR+OJ/mEa052PPi1qv7hd?=
 =?us-ascii?Q?PdIXDhj7rY33uK/KrzM5LDX1cESnZI8BeAYJ1iMVxhdYb6VP0trVT2kXk4ol?=
 =?us-ascii?Q?FhSKeyQhVz/MIYOsHcItA6DgSlLEyT4aVFVCXE/1fp3Mat5Wh5yMpW6fudZL?=
 =?us-ascii?Q?XxYXPR+/UnhZifBhjJG5sh0viCrq6uaSvgsPtysEPHU1dHmsdMfF6qWIakTd?=
 =?us-ascii?Q?agzmPZrtE2JOvOp6n1qtr8qYwBcQgmLIrxDmytUToDGpoz6fE19nhmq4V2Tg?=
 =?us-ascii?Q?Wev2WWEBEeW1wLLU7QscKBV7YcdKJ+4PiS02P3Oenwt79Jhl1uEkZBYfCFL1?=
 =?us-ascii?Q?waY6UAdCRgC8JuThvAWiHB7xfqZ6fy6VKeHD+xo/Yedjvbd8385EunR6Krv8?=
 =?us-ascii?Q?uZ9zufNn07jjy3lwbhfMTncYBWVILd6lU2grkctbAyANqWV2T/Aspa/BUs7H?=
 =?us-ascii?Q?ddjcfcPI0yn7QaGmvXGsvS0xj8BzGLNdCeylPZQ8?=
X-OriginatorOrg: Nvidia.com
X-MS-Exchange-CrossTenant-Network-Message-Id: 78ff6e20-3d25-417a-4840-08db19873e40
X-MS-Exchange-CrossTenant-AuthSource: LV2PR12MB5869.namprd12.prod.outlook.com
X-MS-Exchange-CrossTenant-AuthAs: Internal
X-MS-Exchange-CrossTenant-OriginalArrivalTime: 28 Feb 2023 12:28:06.4372
 (UTC)
X-MS-Exchange-CrossTenant-FromEntityHeader: Hosted
X-MS-Exchange-CrossTenant-Id: 43083d15-7273-40c1-b7db-39efd9ccc17a
X-MS-Exchange-CrossTenant-MailboxType: HOSTED
X-MS-Exchange-CrossTenant-UserPrincipalName: zeSLlCEM424MZgLX5JzGqJh5SRg6mhEABquTA/4FNjUSRm9kVueRL+O3pdxVHizp
X-MS-Exchange-Transport-CrossTenantHeadersStamped: MN0PR12MB6223
Precedence: bulk
List-ID: <linux-kernel.vger.kernel.org>
X-Mailing-List: linux-kernel@vger.kernel.org

On Tue, Feb 28, 2023 at 04:36:26AM +0200, Jarkko Sakkinen wrote:
> On Mon, Feb 27, 2023 at 05:37:01PM +0530, Krishna Yarlagadda wrote:
> > TPM devices raise wait signal on last addr cycle. This can be detected
> > by software driver by reading MISO line on same clock which requires
> > full duplex support. In case of half duplex controllers wait detection
> > has to be implemented in HW.
> > Support hardware wait state detection by sending entire message and let
> > controller handle flow control.
> 
> When a is started sentence with the word "support" it translates to "I'm
> too lazy to write a proper and verbose description of the implementation"
> :-)
> 
> It has some abstract ideas of the implementation, I give you that, but do
> you think anyone ever will get any value of reading that honestly? A bit
> more concrette description of the change helps e.g. when bisecting bugs.

I would expect SPI_TPM_HW_FLOW to be documented in the kdocs to a
level that any other HW could implement it as well.

> > +int tpm_tis_spi_transfer(struct tpm_tis_data *data, u32 addr, u16 len,
> > +			 u8 *in, const u8 *out)
> > +{
> > +	struct tpm_tis_spi_phy *phy = to_tpm_tis_spi_phy(data);
> > +	struct spi_controller *ctlr = phy->spi_device->controller;
> > +
> > +	/*
> > +	 * TPM flow control over SPI requires full duplex support.
> > +	 * Send entire message to a half duplex controller to handle
> > +	 * wait polling in controller.
> > +	 * Set TPM HW flow control flag..
> > +	 */
> > +	if (ctlr->flags & SPI_CONTROLLER_HALF_DUPLEX) {
> > +		phy->spi_device->mode |= SPI_TPM_HW_FLOW;

Shouldn't we check that this special flow is supported when the SPI
device is bound to the tpm in the first place?

Jason