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[180.214.232.27]) by smtp.gmail.com with ESMTPSA id x6-20020a1709029a4600b001992b8cf89bsm7279993plv.16.2023.02.28.19.50.23 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Tue, 28 Feb 2023 19:50:24 -0800 (PST) Received: by debian.me (Postfix, from userid 1000) id D41941034B0; Wed, 1 Mar 2023 10:50:20 +0700 (WIB) Date: Wed, 1 Mar 2023 10:50:20 +0700 From: Bagas Sanjaya To: Rob Clark , dri-devel@lists.freedesktop.org Cc: freedreno@lists.freedesktop.org, Daniel Vetter , Christian =?utf-8?B?S8O2bmln?= , Michel =?utf-8?Q?D=C3=A4nzer?= , Tvrtko Ursulin , Rodrigo Vivi , Alex Deucher , Pekka Paalanen , Simon Ser , Luben Tuikov , Rob Clark , Christian =?utf-8?B?S8O2bmln?= , Sumit Semwal , Jonathan Corbet , Gustavo Padovan , "open list:DMA BUFFER SHARING FRAMEWORK" , "moderated list:DMA BUFFER SHARING FRAMEWORK" , "open list:DOCUMENTATION" , open list Subject: Re: [PATCH v7 01/15] dma-buf/dma-fence: Add deadline awareness Message-ID: References: <20230227193535.2822389-1-robdclark@gmail.com> <20230227193535.2822389-2-robdclark@gmail.com> MIME-Version: 1.0 Content-Type: multipart/signed; micalg=pgp-sha512; protocol="application/pgp-signature"; boundary="oTYOw6gqQhDOyhTR" Content-Disposition: inline In-Reply-To: <20230227193535.2822389-2-robdclark@gmail.com> Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org --oTYOw6gqQhDOyhTR Content-Type: text/plain; charset=utf-8 Content-Disposition: inline Content-Transfer-Encoding: quoted-printable On Mon, Feb 27, 2023 at 11:35:07AM -0800, Rob Clark wrote: > diff --git a/Documentation/driver-api/dma-buf.rst b/Documentation/driver-= api/dma-buf.rst > index 622b8156d212..183e480d8cea 100644 > --- a/Documentation/driver-api/dma-buf.rst > +++ b/Documentation/driver-api/dma-buf.rst > @@ -164,6 +164,12 @@ DMA Fence Signalling Annotations > .. kernel-doc:: drivers/dma-buf/dma-fence.c > :doc: fence signalling annotation > =20 > +DMA Fence Deadline Hints > +~~~~~~~~~~~~~~~~~~~~~~~~ > + > +.. kernel-doc:: drivers/dma-buf/dma-fence.c > + :doc: deadline hints > + > DMA Fences Functions Reference > ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ > =20 > diff --git a/drivers/dma-buf/dma-fence.c b/drivers/dma-buf/dma-fence.c > index 0de0482cd36e..e103e821d993 100644 > --- a/drivers/dma-buf/dma-fence.c > +++ b/drivers/dma-buf/dma-fence.c > @@ -912,6 +912,65 @@ dma_fence_wait_any_timeout(struct dma_fence **fences= , uint32_t count, > } > EXPORT_SYMBOL(dma_fence_wait_any_timeout); > =20 > +/** > + * DOC: deadline hints > + * > + * In an ideal world, it would be possible to pipeline a workload suffic= iently > + * that a utilization based device frequency governor could arrive at a = minimum > + * frequency that meets the requirements of the use-case, in order to mi= nimize > + * power consumption. But in the real world there are many workloads wh= ich > + * defy this ideal. For example, but not limited to: > + * > + * * Workloads that ping-pong between device and CPU, with alternating p= eriods > + * of CPU waiting for device, and device waiting on CPU. This can res= ult in > + * devfreq and cpufreq seeing idle time in their respective domains an= d in > + * result reduce frequency. > + * > + * * Workloads that interact with a periodic time based deadline, such a= s double > + * buffered GPU rendering vs vblank sync'd page flipping. In this sce= nario, > + * missing a vblank deadline results in an *increase* in idle time on = the GPU > + * (since it has to wait an additional vblank period), sending a singl= e to > + * the GPU's devfreq to reduce frequency, when in fact the opposite is= what is > + * needed. > + * > + * To this end, deadline hint(s) can be set on a &dma_fence via &dma_fen= ce_set_deadline. > + * The deadline hint provides a way for the waiting driver, or userspace= , to > + * convey an appropriate sense of urgency to the signaling driver. > + * > + * A deadline hint is given in absolute ktime (CLOCK_MONOTONIC for users= pace > + * facing APIs). The time could either be some point in the future (suc= h as > + * the vblank based deadline for page-flipping, or the start of a compos= itor's > + * composition cycle), or the current time to indicate an immediate dead= line > + * hint (Ie. forward progress cannot be made until this fence is signale= d). > + * > + * Multiple deadlines may be set on a given fence, even in parallel. Se= e the > + * documentation for &dma_fence_ops.set_deadline. > + * > + * The deadline hint is just that, a hint. The driver that created the = fence > + * may react by increasing frequency, making different scheduling choice= s, etc. > + * Or doing nothing at all. > + */ > + > +/** > + * dma_fence_set_deadline - set desired fence-wait deadline hint > + * @fence: the fence that is to be waited on > + * @deadline: the time by which the waiter hopes for the fence to be > + * signaled > + * > + * Give the fence signaler a hint about an upcoming deadline, such as > + * vblank, by which point the waiter would prefer the fence to be > + * signaled by. This is intended to give feedback to the fence signaler > + * to aid in power management decisions, such as boosting GPU frequency > + * if a periodic vblank deadline is approaching but the fence is not > + * yet signaled.. > + */ > +void dma_fence_set_deadline(struct dma_fence *fence, ktime_t deadline) > +{ > + if (fence->ops->set_deadline && !dma_fence_is_signaled(fence)) > + fence->ops->set_deadline(fence, deadline); > +} > +EXPORT_SYMBOL(dma_fence_set_deadline); > + > /** > * dma_fence_describe - Dump fence describtion into seq_file > * @fence: the 6fence to describe > diff --git a/include/linux/dma-fence.h b/include/linux/dma-fence.h > index 775cdc0b4f24..87c0d846dbb4 100644 > --- a/include/linux/dma-fence.h > +++ b/include/linux/dma-fence.h > @@ -257,6 +257,24 @@ struct dma_fence_ops { > */ > void (*timeline_value_str)(struct dma_fence *fence, > char *str, int size); > + > + /** > + * @set_deadline: > + * > + * Callback to allow a fence waiter to inform the fence signaler of > + * an upcoming deadline, such as vblank, by which point the waiter > + * would prefer the fence to be signaled by. This is intended to > + * give feedback to the fence signaler to aid in power management > + * decisions, such as boosting GPU frequency. > + * > + * This is called without &dma_fence.lock held, it can be called > + * multiple times and from any context. Locking is up to the callee > + * if it has some state to manage. If multiple deadlines are set, > + * the expectation is to track the soonest one. > + * > + * This callback is optional. > + */ > + void (*set_deadline)(struct dma_fence *fence, ktime_t deadline); > }; > =20 > void dma_fence_init(struct dma_fence *fence, const struct dma_fence_ops = *ops, > @@ -583,6 +601,8 @@ static inline signed long dma_fence_wait(struct dma_f= ence *fence, bool intr) > return ret < 0 ? ret : 0; > } > =20 > +void dma_fence_set_deadline(struct dma_fence *fence, ktime_t deadline); > + > struct dma_fence *dma_fence_get_stub(void); > struct dma_fence *dma_fence_allocate_private_stub(void); > u64 dma_fence_context_alloc(unsigned num); The doc LGTM, thanks! Reviewed-by: Bagas Sanjaya --=20 An old man doll... just what I always wanted! - Clara --oTYOw6gqQhDOyhTR Content-Type: application/pgp-signature; name="signature.asc" -----BEGIN PGP SIGNATURE----- iHUEABYKAB0WIQSSYQ6Cy7oyFNCHrUH2uYlJVVFOowUCY/7LdwAKCRD2uYlJVVFO o+yRAQCD//a9bLGYLjTrMNBYwCLBiPxnmV7phSin6w6b2ykgIgD+IsVkADZfyUA7 J+62fGEud4jd/xybHjUgjSdSoJL4sQI= =yfmJ -----END PGP SIGNATURE----- --oTYOw6gqQhDOyhTR--