Date:   Wed, 1 Mar 2023 17:02:27 +0530
From:   Manivannan Sadhasivam <manivannan.sadhasivam@linaro.org>
To:     Andrew Halaney <ahalaney@redhat.com>
Cc:     andersson@kernel.org, konrad.dybcio@linaro.org, robh+dt@kernel.org,
        krzysztof.kozlowski+dt@linaro.org, linux-arm-msm@vger.kernel.org,
        devicetree@vger.kernel.org, linux-kernel@vger.kernel.org,
        arnd@arndb.de
Subject: Re: [PATCH 00/16] Qcom: Fix PCI I/O range defined in devicetree
Message-ID: <20230301113227.GE5409@thinkpad>
References: <20230228164752.55682-1-manivannan.sadhasivam@linaro.org>
 <20230228172952.nfjce7cjos6tume3@halaney-x13s>
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On Tue, Feb 28, 2023 at 11:29:52AM -0600, Andrew Halaney wrote:
> On Tue, Feb 28, 2023 at 10:17:36PM +0530, Manivannan Sadhasivam wrote:
> > Hi,
> > 
> > This series fixes the issue with PCI I/O ranges defined in devicetree of
> > Qualcomm SoCs as reported by Arnd [1]. Most of the Qualcomm SoCs define
> > identical mapping for the PCI I/O range. But the PCI device I/O ports
> > are usually located between 0x0 to 64KiB/1MiB. So the defined PCI addresses are
> > mostly bogus. The lack of bug report on this issue indicates that no one really
> > tested legacy PCI devices with these SoCs.
> > 
> > This series also contains a couple of cleanup patches that aligns the entries of
> > ranges property.
> > 
> > Thanks,
> > Mani
> > 
> > [1] https://lore.kernel.org/linux-arm-msm/7c5dfa87-41df-4ba7-b0e4-72c8386402a8@app.fastmail.com/
> > 
> > Manivannan Sadhasivam (16):
> >   arm64: dts: qcom: sdm845: Fix the PCI I/O port range
> >   arm64: dts: qcom: msm8998: Fix the PCI I/O port range
> >   arm64: dts: qcom: sc7280: Fix the PCI I/O port range
> >   arm64: dts: qcom: sm8550: Fix the PCI I/O port range
> >   arm64: dts: qcom: ipq8074: Fix the PCI I/O port range
> >   arm64: dts: qcom: ipq6018: Fix the PCI I/O port range
> >   arm64: dts: qcom: msm8996: Fix the PCI I/O port range
> >   arm64: dts: qcom: sm8250: Fix the PCI I/O port range
> >   arm64: dts: qcom: qcs404: Use 0x prefix for the PCI I/O and MEM ranges
> >   arm64: dts: qcom: sc8280xp: Fix the PCI I/O port range
> >   arm64: dts: qcom: sm8150: Fix the PCI I/O port range
> >   arm64: dts: qcom: sm8450: Fix the PCI I/O port range
> >   arm64: dts: qcom: sm8350: Fix the PCI I/O port range
> >   ARM: dts: qcom: apq8064: Use 0x prefix for the PCI I/O and MEM ranges
> >   ARM: dts: qcom: ipq4019: Fix the PCI I/O port range
> >   ARM: dts: qcom: ipq8064: Fix the PCI I/O port range
> > 
> >  arch/arm/boot/dts/qcom-apq8064.dtsi    |  4 ++--
> >  arch/arm/boot/dts/qcom-ipq4019.dtsi    |  4 ++--
> >  arch/arm/boot/dts/qcom-ipq8064.dtsi    | 12 ++++++------
> >  arch/arm64/boot/dts/qcom/ipq6018.dtsi  |  4 ++--
> >  arch/arm64/boot/dts/qcom/ipq8074.dtsi  | 12 ++++--------
> >  arch/arm64/boot/dts/qcom/msm8996.dtsi  | 12 ++++++------
> >  arch/arm64/boot/dts/qcom/msm8998.dtsi  |  2 +-
> >  arch/arm64/boot/dts/qcom/qcs404.dtsi   |  4 ++--
> 
> Would you mind giving sa8540p.dtsi to similiar treatment? I will admit
> I know next to nothing about PCI techically, so I can't even comment
> with confidence that this is needed there, but it looks similar to other
> descriptions modified in this patch series.
> 
>     https://git.kernel.org/pub/scm/linux/kernel/git/torvalds/linux.git/tree/arch/arm64/boot/dts/qcom/sa8540p.dtsi#n197

Ah, I didn't spot the separate ranges used for this SoC. Will fix it in next
revision.

Thanks,
Mani

> 
> Thanks,
> Andrew
> 

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